SM320C6455-EP

FIXED-POINT DIGITAL SIGNAL PROCESSOR

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SPRS462B – SEPTEMBER 2007 – REVISED JANUARY 2008

10

 

HAS (input)

 

12

 

11

 

HCNTL[1:0]

 

(input)

 

HR/W (input)

 

9

 

 

13

HSTROBE(A)

 

(input)

 

37

 

HCS (input)

 

 

18

 

17

HD[31:0] (input)

 

35

34

36

38

5

HRDY(B) (output)

 

A.HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS.

B.Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto-incrementing) and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed information on the HPI peripheral, see the TMS320C645x DSP Host Port Interface (HPI) User's Guide (literature number SPRU969).

C.The timing tw(HSTBH), HSTROBE high pulse duration, must be met between consecutive HPI accesses in HPI32 mode.

Figure 7-51. HPI32 Write Timing (HAS Used)

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C64x+ Peripheral Information and Electrical Specifications

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Texas Instruments SM320C6455-EP manual HPI32 Write Timing has Used, Input HCS input HD310 input