Texas Instruments SM320C6455-EP manual FIXED-POINT Digital Signal Processor

SM320C6455-EP

FIXED-POINT DIGITAL SIGNAL PROCESSOR

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SPRS462B – SEPTEMBER 2007 – REVISED JANUARY 2008

Other new features include:

∙SPLOOP - A small instruction buffer in the CPU that aids in creation of software pipelining loops where multiple iterations of a loop are executed in parallel. The SPLOOP buffer reduces the code size associated with software pipelining. Furthermore, loops in the SPLOOP buffer are fully interruptible.

∙Compact Instructions - The native instruction size for the C6000 devices is 32 bits. Many common instructions such as MPY, AND, OR, ADD, and SUB can be expressed as 16 bits if the C64x+ compiler can restrict the code to use certain registers in the register file. This compression is performed by the code generation tools.

∙Instruction Set Enhancements - As noted above, there are new instructions such as 32 bit multiplications, complex multiplications, packing, sorting, bit manipulation, and 32 bit Galois field multiplication.

∙Exception Handling - Intended to aid the programmer in isolating bugs. The C64x+ CPU is able to detect and respond to exceptions, both from internally detected sources (such as illegal op-codes) and from system events (such as a watchdog time expiration).

∙Privilege - Defines user and supervisor modes of operation, allowing the operating system to give a basic level of protection to sensitive resources. Local memory is divided into multiple pages, each with read, write, and execute permissions.

∙Time-Stamp Counter - Primarily targeted for Real-Time Operating System (RTOS) robustness, a free-running time-stamp counter is implemented in the CPU which is not sensitive to system stalls.

For more details on the C64x+ CPU and its enhancements over the C64x architecture, see the following documents:

∙TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732)

∙TMS320C64x+ DSP Cache User's Guide (literature number SPRU862)

∙TMS320C64x+ Megamodule Reference Guide (literature number SPRU871)

∙TMS320C6455 Technical Reference (literature number SPRU965)

∙TMS320C64x to TMS320C64x+ CPU Migration Guide (literature number SPRAA84)

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