SM320C6455-EP

FIXED-POINT DIGITAL SIGNAL PROCESSOR

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SPRS462B – SEPTEMBER 2007 – REVISED JANUARY 2008

7.2Recommended Clock and Control Signal Transition Behavior

All clocks and control signals must transition between VIH and VIL (or between VIL and VIH) in a monotonic manner.

7.3Power Supplies

7.3.1Power-Supply Sequencing

TI recommends the power-supply sequence shown in Figure 7-5. After the DVDD33 supply is stable, the remaining power supplies can be powered up at the same time as CVDD as long as their supply voltage never exceeds the CVDD voltage during powerup. Some TI power-supply devices include features that facilitate power sequencing; for example, Auto-Track or Slow-Start/Enable features. For more information, visit www.ti.com/dsppower.

DVDD33

1

CVDD12

2

All other power supplies

Figure 7-5. Power-Supply Sequence

Table 7-2. Timing Requirements for Power-Supply Sequence

 

 

 

-720

 

 

 

 

 

-850

 

 

NO.

 

 

A-1000/-1000

UNIT

 

 

 

-1200

 

 

 

 

 

MIN

MAX

 

1

tsu(DVDD33-CVDD12)

Setup time, DVDD33 supply stable before CVDD12 supply stable

0.5

200

ms

2

tsu(CVDD12-ALLSUP)

Setup time, CVDD12 supply stable before all other supplies stable

0

200

ms

7.3.2Power-Supply Decoupling

To properly decouple the supply planes from system noise, place as many capacitors (caps) as possible close to the DSP. These caps need to be close to the DSP, no more than 1.25 cm maximum distance to be effective. Physically smaller caps are better, such as 0402, but need to be evaluated from a yield/manufacturing point-of-view. Parasitic inductance limits the effectiveness of the decoupling capacitors, therefore physically smaller capacitors should be used while maintaining the largest available capacitance value. As with the selection of any component, verification of capacitor availability over the product's production lifetime should be considered.

7.3.3Power-Down Operation

One of the power goals for the C6455 is to reduce power dissipation due to unused peripherals. There are different ways to power down peripherals on the C6455 device.

Some peripherals can be statically powered down at device reset through the device configuration pins (see Section 3.1, Device Configuration at Device Reset). Once in a static power-down state, the peripheral is held in reset and its clock is turned off. Peripherals cannot be enabled once they are in a static power-down state. To take a peripheral out of the static power-down state, a device reset must be executed with a different configuration pin setting.

After device reset, all peripherals on the C6455 device are in a disabled state and must be enabled by software before being used. It is possible to enable only the peripherals needed by the application while keeping the rest disabled. Note that peripherals in a disabled state are held in reset with their clocks gated. For more information on how to enable peripherals, see Section 3.3, Peripheral Selection After Device Reset.

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C64x+ Peripheral Information and Electrical Specifications

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Texas Instruments SM320C6455-EP manual Recommended Clock and Control Signal Transition Behavior, Power Supplies