Texas Instruments SM320C6455-EP manual Device Configuration

SM320C6455-EP

FIXED-POINT DIGITAL SIGNAL PROCESSOR

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SPRS462B – SEPTEMBER 2007 – REVISED JANUARY 2008

Table 2-3. Terminal Functions (continued)

SIGNAL

NAME

URDATA7/MRXD7

URDATA6/MRXD6

URDATA5/MRXD5

URDATA4/MRXD4 URDATA3/MRXD3 URDATA2/MRXD2

URDATA1/MRXD1/

RMRXD1

URDATA0/MRXD0/

RMRXD0

UXCLAV/GMTCLK

UXCLK/MTCLK/

RMREFCLK

UXSOC/MCOL

UXENB/MTXEN/ RMTXEN

UXDATA7/MTXD7 UXDATA6/MTXD6 UXDATA5/MTXD5

UXDATA4/MTXD4

UXDATA3/MTXD3

UXDATA2/MTXD2

UXDATA1/MTXD1/

RMTXD1

UXDATA0/MTXD0/

RMTXD0

NO.

M2

H2

L2

L1

J3

J1

H3

J2

K5

N4

K3

J5

N5

M3

L5

L3

K4

M4

L4

M1

TYPE(1) IPD/IPU(2)	DESCRIPTION
	UTOPIA 8 bit Receive Data Bus (I) [default] or EMAC receive data bus for MII
	[default], RMII, or GMII
	Using the Receive Data Bus, the UTOPIA Slave (on the rising edge of the
I	URCLK) can receive the 8 bit ATM cell data from the Master ATM Controller.
	When the UTOPIA peripheral is disabled (UTOPIA_EN [AEA12 pin] = 0), these
	pins function as EMAC receive data pins for MII [default], RMII, or GMII
	(MRXD[x:0]) (I). MACSEL[1:0] dependent.
	Transmit cell available status output signal from UTOPIA slave (O).
	∙ 0 indicates a complete cell is NOT available for transmit
O/Z	∙ 1 indicates a complete cell is available for transmit
	When the UTOPIA peripheral is disabled (UTOPIA_EN [AEA12 pin] = 0), this
	pin is EMAC GMII transmit clock (GMTCLK) (O). MACSEL[1:0] dependent.
	UTOPIA transmit source clock (UXCLK) driven by Master ATM Controller (I) or
	when the UTOPIA peripheral is disabled (UTOPIA_EN [AEA12 pin] = 0), this
I	pin is either EMAC MII [default] or GMII transmit clock (MTCLK) (I) or the
	EMAC RMII reference clock (RMREFCLK) (I). The EMAC function is controlled
	by the MACSEL[1:0] (AEA[10:9] pins). For more detailed information, see
	Section 3, Device Configuration.
	UTOPIA transmit Start-of-Cell signal (O). This signal is output by the UTOPIA
	Slave on the rising edge of the UXCLK, indicating that the first valid byte of the
I/O/Z	cell is available on the 8 bit Transmit Data Bus (UXDATA[7:0]).
	When the UTOPIA peripheral is disabled (UTOPIA_EN [AEA12 pin] = 0), this
	pin is the EMAC collision sense (MCDL) (I) for MII [default] or GMII.
	MACSEL[1:0] dependent.
	UTOPIA transmit interface enable input signal [default] (I) or when the UTOPIA
I/O/Z	peripheral is disabled (UTOPIA_EN [AEA12 pin] = 0), this pin is either the
	EMAC transmit enable (MTXEN) (O) for MII [default], RMII, or GMII.
	MACSEL[1:0] dependent.
	UTOPIA 8 bit transmit data bus (O) [default] or EMAC transmit data bus for MII
	[default], RMII, or GMII.
	Using the Transmit Data Bus, the UTOPIA Slave (on the rising edge of the
O/Z	UXCLK) transmits the 8 bit ATM cells to the Master ATM Controller.
	When the UTOPIA peripheral is disabled (UTOPIA_EN [AEA12 pin] = 0), these
	pins function as EMAC transmit data pins (MTXD[x:0]) (O) for MII, RMII, or
	GMII. MACSEL[1:0] dependent.

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