Texas Instruments TMS320C645x DSP manual Contents

Contents

Preface			10
1	Introduction		11
	1.1	Purpose of the Peripheral	11
	1.2	Features	11
	1.3	Functional Block Diagram	12
	1.4	Industry Standard(s) Compliance Statement	13
2	EMAC Functional Architecture		14
	2.1	Clock Control	14
	2.2	Memory Map	15
	2.3	System Level Connections	16
	2.4	Ethernet Protocol Overview	24
	2.5	Programming Interface	26
	2.6	EMAC Control Module	37
	2.7	Management Data Input/Output (MDIO) Module	38
	2.8	EMAC Module	43
	2.9	Media Independent Interfaces	46
	2.10	Packet Receive Operation	50
	2.11	Packet Transmit Operation	55
	2.12	Receive and Transmit Latency	55
	2.13	Transfer Node Priority	56
	2.14	Reset Considerations	56
	2.15	Initialization	57
	2.16	Interrupt Support	60
	2.17	Power Management	63
	2.18	Emulation Considerations	63
3	EMAC Control Module Registers		64
	3.1	Introduction	64
	3.2	EMAC Control Module Interrupt Control Register (EWCTL)	64
	3.3	EMAC Control Module Interrupt Timer Count Register (EWINTTCNT)	65
4	MDIO Registers		66
	4.1	Introduction	66
	4.2	MDIO Version Register (VERSION)	67
	4.3	MDIO Control Register (CONTROL)	68
	4.4	PHY Acknowledge Status Register (ALIVE)	69
	4.5	PHY Link Status Register (LINK)	70
	4.6	MDIO Link Status Change Interrupt (Unmasked) Register (LINKINTRAW)	71
	4.7	MDIO Link Status Change Interrupt (Masked) Register (LINKINTMASKED)	72
	4.8	MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW)	73
	4.9	MDIO User Command Complete Interrupt (Masked) Register (USERINTMASKED)	74
	4.10	MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET)	75
	4.11	MDIO User Command Complete Interrupt Mask Clear Register (USERINTMASKCLEAR)	76
	4.12	MDIO User Access Register 0 (USERACCESS0)	77
	4.13	MDIO User PHY Select Register 0 (USERPHYSEL0)	78
	4.14	MDIO User Access Register 1 (USERACCESS1)	79
SPRU975B –August 2006		Table of Contents	3

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