Texas Instruments TMS320C645x DSP manual MAC Control Register Maccontrol Field Descriptions

50	Receive Unicast Enable Set Register (RXUNICASTSET) Field Descriptions	106
51	Receive Unicast Clear Register (RXUNICASTCLEAR) Field Descriptions	107
52	Receive Maximum Length Register (RXMAXLEN) Field Descriptions	108
53	Receive Buffer Offset Register (RXBUFFEROFFSET) Field Descriptions	109
54	Receive Filter Low Priority Frame Threshold Register (RXFILTERLOWTHRESH) Field Descriptions	110
55	Receive Channel n Flow Control Threshold Register (RXnFLOWTHRESH) Field Descriptions	111
56	Receive Channel n Free Buffer Count Register (RXnFREEBUFFER) Field Descriptions	112
57	MAC Control Register (MACCONTROL) Field Descriptions	113
58	MAC Status Register (MACSTATUS) Field Descriptions	115
59	Emulation Control Register (EMCONTROL) Field Descriptions	117
60	FIFO Control Register (FIFOCONTROL) Field Descriptions	118
61	MAC Configuration Register (MACCONFIG) Field Descriptions	119
62	Soft Reset Register (SOFTRESET) Field Descriptions	120
63	MAC Source Address Low Bytes Register (MACSRCADDRLO) Field Descriptions	121
64	MAC Source Address High Bytes Register (MACSRCADDRHI) Field Descriptions	122
65	MAC Hash Address Register 1 (MACHASH1) Field Descriptions	123
66	MAC Hash Address Register 2 (MACHASH2) Field Descriptions	124
67	Back Off Test Register (BOFFTEST) Field Descriptions	125
68	Transmit Pacing Algorithm Test Register (TPACETEST) Field Descriptions	126
69	Receive Pause Timer Register (RXPAUSE) Field Descriptions	127
70	Transmit Pause Timer Register (TXPAUSE) Field Descriptions	128
71	MAC Address Low Bytes Register (MACADDRLO) Field Descriptions	129
72	MAC Address High Bytes Register (MACADDRHI) Field Descriptions	130
73	MAC Index Register (MACINDEX) Field Descriptions	131
74	Transmit Channel n DMA Head Descriptor Pointer Register (TXnHDP) Field Descriptions	132
75	Receive Channel n DMA Head Descriptor Pointer Register (RXnHDP) Field Descriptions	133
76	Transmit Channel n Completion Pointer Register (TXnCP) Field Descriptions	134
77	Receive Channel n Completion Pointer Register (RXnCP) Field Descriptions	135
78	Statistics Register Field Descriptions	136
A-1	Physical Layer Definitions	146
B-1	Document Revision History	147

SPRU975B –August 2006 List of Tables 9

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