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EMAC Port Registers
5.41 Receive Pause Timer Register (RXPAUSE)
The receive pause timer register (RXPAUSE) is shown in Figure 69 and described in Table 69.
| Figure 69. Receive Pause Timer Register (RXPAUSE) |
31 | 16 |
| Reserved |
| |
15 | 0 |
PAUSETIMER
LEGEND: R = Read only;
Table 69. Receive Pause Timer Register (RXPAUSE) Field Descriptions
Bit | Field | Value | Description |
Reserved | 0 | Reserved | |
PAUSETIMER |
| Receive pause timer value. These bits allow the contents of the receive pause timer to be | |
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| observed. The receive pause timer is loaded with FF00h when the EMAC sends an outgoing pause |
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| frame (with pause time of FFFFh). The receive pause timer is decremented at slot time intervals. If |
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| the receive pause timer decrements to 0, then another outgoing pause frame is sent and the |
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| load/decrement process is repeated. |
SPRU975B | Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) | 127 |
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