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MDIO Registers

4.4PHY Acknowledge Status Register (ALIVE)

The PHY acknowledge status register (ALIVE) is shown in Figure 18 and described in Table 17.

 

Figure 18. PHY Acknowledge Status Register (ALIVE)

31

16

 

ALIVE

 

R/WC-0

15

0

 

ALIVE

R/WC-0

LEGEND: R/W = Read/Write; R/WC = Read/Write 1 to clear; -n= value after reset

Table 17. PHY Acknowledge Status Register (ALIVE) Field Descriptions

Bit

Field

Value

Description

31-0

ALIVE

 

MDIO Alive bits. Each of the 32 bits of this register is set if the most recent access to the PHY with

 

 

 

address corresponding to the register bit number was acknowledged by the PHY; the bit is reset if

 

 

 

the PHY fails to acknowledge the access. Both the user and polling accesses to a PHY will cause

 

 

 

the corresponding alive bit to be updated. The alive bits are only meant to be used to give an

 

 

 

indication of the presence or not of a PHY with the corresponding address. Writing a 1 to any bit

 

 

 

will clear it, writing a 0 has no effect.

 

 

0

The PHY fails to acknowledge the access

 

 

1

The most recent access to the PHY with an address corresponding to the register bit number was

 

 

 

acknowledged by the PHY.

SPRU975B –August 2006

Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)

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Texas Instruments TMS320C645x DSP manual PHY Acknowledge Status Register Alive