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EMAC Functional Architecture
2.7.2.2Writing Data to a PHY Register
The MDIO module includes a user access register (USERACCESSn) to directly access a specified PHY device. To write a PHY register, perform the following:
1.Ensure that the GO bit in the USERACCESSn register is cleared.
2.Write to the GO, WRITE, REGADR, PHYADR, and DATA bits in USERACCESSn corresponding to the desired PHY and PHY register.
3.The write operation to the PHY is scheduled and completed by the MDIO module. Completion of the write operation can be determined by polling the GO bit in USERACCESSn for a 0.
4.Completion of the operation sets the corresponding bit in the USERINTRAW register for the USERACCESSn used. If interrupts have been enabled on this bit using the USERINTMASKSET register, then the bit is also set in the USERINTMASKED register and an interrupt is triggered on the DSP.
2.7.2.3Reading Data From a PHY Register
The MDIO module includes a user access register (USERACCESSn) to directly access a specified PHY device. To read a PHY register, perform the following:
1.Ensure that the GO bit in the USERACCESSn register is cleared.
2.Write to the GO, REGADR, and PHYADR bits in USERACCESSn corresponding to the desired PHY and PHY register.
3.The read data value is available in the DATA bits of USERACCESSn after the module completes the read operation on the serial bus. Completion of the read operation can be determined by polling the GO and ACK bits in USERACCESSn. Once the GO bit has cleared, the ACK bit is set on a successful read.
4.Completion of the operation sets the corresponding bit in the USERINTRAW register for the USERACCESSn used. If interrupts have been enabled on this bit using the USERINTMASKSET register, then the bit is also set in the USERINTMASKED register and an interrupt is triggered on the DSP.
2.7.2.4Example of MDIO Register Access Code
The MDIO module uses the USERACCESSn register to access the PHY control registers. Software functions that implement the access process include the following four macros:
PHYREG_read (regadr, phyadr ) | Start the process of reading a PHY register |
PHYREG_write(regadr, phyadr, data ) | Start the process of writing a PHY register |
PHYREG_wait ( ) | Synchronize operation (make sure read/write is |
| idle) |
PHYREG_wait Results (results ) | Wait for read to complete and return data read |
It is not necessary to wait after a write operation, as long as the status is checked before every operation to make sure the MDIO hardware is idle. An alternative approach is to call PHYREG_wait () after every write, and PHYREG_wait Results () after every read, then the hardware can be assumed to be idle when starting a new operation.
SPRU975B | Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) | 41 |
