Chapter 5 Remote Interface Reference

Status System Commands

Alarm Register Commands

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STATus:ALARm:CONDition?

Query the condition register in this register group (note that this condition register uses only bit 4). This is a read-only register and bits are not cleared when you read the register. A *RST (Factory Reset) clears the “Queue Empty” bit (bit 4) in the condition register. A query of this register returns a decimal value which corresponds to the binary- weighted sum of all bits set in the register.

STATus:ALARm[:EVENt]?

Query the event register in this register group. This is a read-only register. Once a bit is set, it remains set until cleared by the STATus:ALARm:EVENt? command or *CLS (clear status) command. A query of this register returns a decimal value which corresponds to the binary-weighted sum of all bits set in the register.

STATus:ALARm:ENABle <zv

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STATus:ALARm:ENABle?

 

Enable bits in the enable register in this register group. The selected bits are then reported to the Status Byte. A *CLS (clear status) clear the enable register but it does clear all bits in the event register. A STATus:PRESet clears all bits in the enable register. To enable bits in the enable register, you must write a decimal value which corresponds to the binary-weighted sum of the bits you wish to enable in the register.

The :ENABle? query returns a decimal value which corresponds to the binary-weighted sum of all bits enabled by the STATus:ALARm:ENABle command.

SYSTem:ALARm?

Read the alarm data from the alarm queue (one alarm event is read and cleared each time this command is executed). gzz z yv”v

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HP 34970A manual Status System Commands Alarm Register Commands, STATusALARmCONDition?, STATusALARmEVENt?