Intel 80386 manual ·25.Virtual 8086 Environment Interrupt and Call Handling

80386

PRIVILEGE

LEVEL 0
(HIGHEST)
PRIVILEGE	F= -- . J
LEVEL 3
(LOWEST)
8086 Application makes ··OpenFile Call" ->causes	231630-70
General Protection Fault (Arrow #1)
Virtual 8086 Monitor intercepts call. Calls 386 as (Arrow # 2)

386 as opens file returns control to 8086 as (Arrow # 3) 8086 as returns control to application. (Arrow #4) Transparent to Application

Figure 4·25.Virtual 8086 Environment Interrupt and Call Handling

ing back to protected mode. In addition, all of the 8086 segment register images are stored on the stack (behind the SS:ESP image), and then loaded with null (0) selectors before entering the interrupt handler. This will permit the handler to safely save and restore the OS, ES, FS, and GS registers as 286 selectors. This is needed so that interrupt handlers which don'tcare about the mode of the interrupted program can use the same prolog and epilog code

for state saving (i.e. push all registers in prolog, pop

all in epilog) regardless of whether or not a "native" mode or Virtual 8086 mode program was interrupt-

ed. Restoring null selectors to these registers before executing the IRET will not cause a trap in the inter- rupt handler. Interrupt routines which expect values in the segment registers, or return values in segment registers will have to obtain/return values from the 8086 register images pushed onto the new stack. They will need to know the mode of the interrupted program in order to know where to find/return seg- ment registers, and also to know how to interpret segment register values.

The IRET instruction will perform the inverse of the above sequence. Only the extended 386 IRET in- struction (operand size=32) can be used, and must be executed at level 0 to change the VM bit to 1.

(1)If the NT bit in the FLAGs register is on, an inter- task return is performed. The current state is stored in the current TSS, and the link field in the current TSS is used to locate the TSS for the interrupted task which is to be resumed.

Otherwise, continue with the following sequence.

(2)Read the FLAGS image from SS:8[ESP] into the FLAGS register. This will set VM to the value ac- tive in the interrupted routine.

(3)Pop off the instruction pointer CS:EIP. EIP is popped first, then a 32-bit word is popped which contains the CS value in the lower 16 bits. If VM = 0, this CS load is done as a protected mode segment load. If VM = 1, this will be done as an 8086 segment load.

(4)Increment the ESP register by 4 to bypass the FLAGS image which was "popped" in step 1.

(5)If VM = 1, load segment registers ES, OS, FS,

and GS from memory locations SS:[ESP+ 8],

SS: [ESP + 12], SS: [ESP + 16], and

SS: [ESP + 20], respectively, where the new val- ue of ESP stored in step 4 is used. Since VM = 1, these are done as 8086 segment register loads. Else if VM = 0, check that the selectors in ES, OS, FS, and GS are valid in the interrupted rou- tine. Null out invalid selectors to trap if an at- tempt is made to access through them.

(6)If (RPL(CS) > CPL), pop the stack pointer SS:ESP from the stack. The ESP register is popped first, followed by 32-bits containing SS in the lower 16 bits. If VM = 0, SS is loaded as a protected mode segment register load. If VM = 1, an 8086 segment register load is used.

(7)Resume execution of the interrupted routine. The VM bit in the FLAGS register (restored from the interrupt routine'sstack image in step 1) deter- mines whether the processor resumes the inter- rupted routine in Protected mode of Virtual 8086 mode.

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