Intel 80386 manual Instruction Set Overview, Iopl, Gdtr, Idtr, Ldtr

inter			80386
		Table 2-1. Register Usage
		Use in		Use in		Use in
Register	Real Mode		Protected Mode		Virtual 8086 Mode
	Load	Store	Load	Store	Load	Store
General Registers	Yes	Yes	Yes	Yes	Yes	Yes
Segment Registers	Yes	Yes	Yes	Yes	Yes	Yes
Flag Register	Yes	Yes	Yes	Yes	IOPL	IOPL'
Control Registers	Yes	Yes	PL = 0	PL = 0	No	Yes
GDTR	Yes	Yes	PL = 0	Yes	No	Yes
IDTR	Yes	Yes	PL = 0	Yes	No	Yes
LDTR	No	No	PL = 0	Yes	No	No
TR	No	No	PL = 0	Yes	No	No
Debug Control	Yes	Yes	PL = 0	PL = 0	No	No
Test Registers	Yes	Yes	PL = 0	PL = 0	No	No

NOTES:

PL = 0: The registers can be accessed only when the current privilege level is zero.

'IOPL:The PUSHF and POPF instructions are made I/O Privilege Level sensitive in Virtual 8086 Mode.

5)However, registers which have been previ- ously stored may be reloaded without mask- ing.

Depending upon the values of undefined regis- ter bits will make your software dependent upon the unspecified 80386 handling of these bits. De- pending on undefined values risks making your software incompatible with future processors that define usages for the 80386-undefined bits.

AVOID ANY SOFTWARE DEPENDENCE UPON THE STATE OF UNDEFINED 80386 REGISTER BITS.

2.4 INSTRUCTION SET

2.4.1 Instruction Set Overview

The instruction set is divided into nine categories of operations:

Data Transfer

Arithmetic

Shift/Rotate

String Manipulation

Bit Manipulation

Control Transfer

High Level Language Support

Operating System Support

Processor Control

These 80386 instructions are listed in Table 2·2.

All 80386 instructions operate on either 0, 1, 2, or 3 operands; where an operand resides in a register, in the instruction itself, or in memory. Most zero oper· and instructions (e.g. CLI, STI) take only one byte. One operand instructions generally are two bytes long. The average instruction is 3.2 bytes long. Since the 80386 has a 16·byteinstruction queue, an average of 5 instructions will be prefetched. The use of two operands permits the following types of com- mon instructions:

Register to Register

Memory to Register

Immediate to Register

Register to Memory

Immediate to Memory.

The operands can be either 8, 16, or 32 bits long. As a general rule, when executing code written for the 80386 (32-bit code), operands are 8 or 32 bits; when executing existing 80286 or 8086 code (16-bit code), operands are 8 or 16 bits. Prefixes can be added to all instructions which override the default length of the operands, (Le. use 32-bit operands for 16-bit code, or 16-bit operands for 32-bit code).

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