Intel 80386 manual 2e Bit Manipulation Instructions, 2f. Program Control Instructions

infef80386

Table 2-2dLogical Instructions (Continued)

SHIFTS

SHL/SHR Shift logical left or right

SAL/SAR Shift arithmetic left or right

SHLD/
SHRD	Double shift left or right
	ROTATES

ROL/ROR Rotate left/right

RCLIRCR Rotate through carry left/right

Table 2-2e Bit Manipulation Instructions

	SINGLE BIT INSTRUCTIONS
BT	Bit Test
BTS	Bit Test and Set
BTR	Bit Test and Reset
BTC	Bit Test and Complement
BSF	Bit Scan Forward
BSR	Bit Scan Reverse
	BIT STRING INSTRUCTIONS
IBTS	Insert Bit String
XBTS	Exact Bit String
Table 2-2f Program Control Instructions
	CONDITIONAL TRANSFERS
SETCC	Set byte equal to condition code

JA/JNBE Jump if above/not below nor equal JAE/JNB Jump if above or equal/not below JB/JNAE Jump if below/not above nor equal

JBE/JNA	Jump if below or equal/not above
JC	Jump if carry
JE/JZ	Jump if equal/zero

JG/JNLE Jump if greater/not less nor equal JGE/JNL Jump if greater or equal/not less

JL/JNGE	Jump if less/not greater nor equal
JLE/JNG	Jump if less or equal/not greater
JNC	Jump if not carry
JNE/JNZ	Jump if not equal/not zero
JNO	Jump if not overflow
JNP/JPO	Jump if not parity/parity odd
JNS	Jump if not sign
JO	Jump if overflow
JP/JPE	Jump if parity/parity even
JS	Jump if Sign

Table 2-2f. Program Control Instructions

(Continued)

UNCONDITIONAL TRANSFERS

CALL Call procedure/task

RET Return from procedure

JMP Jump

ITERATION CONTROLS

LOOP Loop

LOOPE/

LOOPZ Loop if equal/zero

LOOPNE/

LOOPNZ Loop if not equal/not zero

JCXZ	JUMP if register CX = 0
	INTERRUPTS
INT	Interrupt
"INTO	Interrupt if overflow
IRET	Return from Interrupt/Task
CLI	Clear interrupt Enable
SLI	Set Interrupt Enable
Table 2-2g High Level Language Instructions
BOUND	Check Array Bounds
ENTER	Setup Parameter Block for Entering
	Procedure
LEAVE	Leave Procedure
	Table 2-2h Protection Model
SGDT	Store Global Descriptor Table
SIDT	Store Interrupt Descriptor Table
STR	Store Task Register
SLDT	Store Local Descriptor Table
LGDT	Load Global Descriptor Table
LlDT	Load Interrupt Descriptor Table
LTR	Load Task Register
LLDT	Load Local Descriptor Table
ARPL	Adjust Requested Privilege Level
LAR	Load Access Rights
LSL	Load Segment Limit
VERR/
VERW	Verify Segment for Reading or Writing
LMSW	Load Machine Status Word (lower
	16 bits of CRO)
SMSW	Store Machine Status Word
Table 2-2i Processor Control Instructions
HLT	Halt
WAIT	Wait until BUSY # negated
ESC	Escape
LOCK	Lock Bus

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