Intel 80386 manual Operand Alignment, Beo# Bhe# Ble# Ad

intJ80386

pipelined address with 16-bit memories then BEO # - BE3 # and WIR # are also decoded to determine when BS16# should be asserted. See 5.4.3.7 Maxi- mum Pipelined Address Usage with 16-Bit Bus Size.)

A2-A31 are directly usable for addressing 32-bit and 16-bit devices. To address 16-bit devices, A1 and two byte enable signals are also needed.

To generate an A1 signal and two Byte Enable sig- nals for 16-bit access, BEO#-BE3# should be de- coded as in Table 5-7. Note certain combinations of BEO#-BE3# are never generated by the 80386, leading to "don'tcare" conditions in the decoder. Any BEO#-BE3# decoder, such as Figure 5-7, may use the non-occurring BEO#-BE3# combinations to its best advantage.

5.3.6 Operand Alignment

With the flexibility of memory addressing on the 80386, it is possible to transfer a logical operand that spans more than one physical Oword or word of memory or 110. Examples are 32-bit Oword oper- ands beginning at addresses not evenly divisible by

4, or a 16-bit word operand split between two physi- cal Owords of the memory array.

Operand alignment and data bus size dictate when multiple bus cycles are required. Table 5-8 describes the transfer cycles generated for all combinations of logical operand lengths, alignment, and data bus siz- ing. When multiple bus cycles are required to trans- fer a multi-byte logical operand, the highest-order bytes are transferred first (but if BS16 # asserted requires two 16-bit cycles be performed, that part of the transfer is low-order first).

5.4 BUS FUNCTIONAL DESCRIPTION

5.4.1 Introduction

The 80386 has separate, parallel buses for data and address. The data bus is 32-bits in width, and bidi- rectional. The address bus provides a 32-bit value using 30 signals for the 30 upper-order address bits and 4 Byte Enable signals to directly indicate the active bytes. These buses are interpreted and con- trolled via several associated definition or control signals.

	Table 5-7. Generating A1, BHE# and BLE# for Addressing 16-Bit Devices
	80386 Signals				16-Bit Bus Signals		Comments
BE3#			BEO#		BHE#	BLE# (AD)
	BE2#	BE1#		A1
H*	H*	H*	H*	x	x	x	x-no active bytes
H	H	H	L	L	H	L
H	H	L	H	L	L	H
H	H	L	L	L	L	L
H	L	H	H	H	H	L
H*	L*	H*	L*	x	x	x	x-not contiguous bytes
H	L	L	H	L	L	H
H	L	L	L	L	L	L
L	H	H	H	H	L	H
L*	H*	H*	L*	x	x	x	x-not contiguous bytes
L*	H*	L*	H*	x	x	x	x-not contiguous bytes
L*	H*	L*	L*	x	x	x	x-not contiguous bytes
L	L	H	H	H	L	L
L*	L*	H*	L*	x	x	x	x-not continguous bytes
L	L	L	H	L	L	H
L	L	L	L	L	L	L

BLE # asserted when 00-07 of 16-bit bus is active.

BHE# asserted when 08-015 of 16-bit bus is active.

A1 low for all even words; A1 high for all odd words.

Key:

x = don'tcare

H= high voltage level L = low voltage level

* = a non-occurring pattern of Byte Enables; either none are asserted, or the pattern has Byte Enables asserted for non-contiguous bytes

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