infef80386
Table 8-1. 803861ns ruet"Ion StCIe oekCount 5 ummary (Contlnued)
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| CLOCK COUNT | NOTES | ||
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| Real |
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INSTRUCTION | FORMAT |
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| Address | Protected | Address | Protected | |
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| Madear | Virtual | Modear | Virtual |
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| Virtual | Address | Virtual | Address |
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| 8086 | Mode | 8086 | Mode |
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| Mode |
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SlOT | ~ Store Interrupt Descriptor | I 00001111 |
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| Table Register | I | 00000001 | ImodOOl | rIm I | 9 | 9 | b,c | h | |
SLOT | ~ Store Local Descriptor Table Register |
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| To Register/Memory | I 00001111 | I | 00000000 | I modOOO | rIm! | N/A | 2/2 | a | h |
SMSW | ~ Store Machine | I 00001111 |
| 00000001 |
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| b,c | h, I |
| Status Word | I | Imodl00 | 10/13 | 10/13 | |||||
STR | ~ Store Task Register | I 00001111 |
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| !modOO 1 |
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| To RegisterlMemory | I | 00000000 | rIm! | N/A | 2/2 | a | h | ||
VERR | ~ Verify Read Accesss | I 00001111 |
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| Register/Memory | I | 00000000 | I modI 00 | r/ml | N/A | 10/11 | a | g, h,j, P | |
VERW | ~ Verify Write Accesss | I 00001111 | I | 00000000 | ImodI 01 | r/ml | N/A | 15/16 | a | g, h,j, P |
INSTRUCTION NOTES FOR TABLE 8-1
Notes a through c apply to 80386 Real Address Mode only:
a. This is a Protected Mode instruction. Attempted execution in Real Mode will result in exception 6 (invalid opcode).
b. Exception 13 fault (general protection) will occur in Real Mode if an operand reference is made that partially or fully extends beyond the maximum CS, OS, ES, FS or GS limit, FFFFH. Exception 12 fault (stack segment limit violation or not present) will occur in Real Mode if an operand reference is made that partially or fully extends beyond the maximum SS limit. c. This instruction may be executed in Real Mode. In Real Mode, its purpose is primarily to initialize the CPU for Protected Mode.
Notes d throughg apply to 80386 Real Address Mode and 80386 Protected Virtual Address Mode:
d. The iAPX 386 uses an
Clock counts given are minimum to maximum. To calculate actual clocks use the following formula: Actual Clock = if m < > 0 then max ([IOg2 Imll. 3) + 6 clocks:
if m = 0 then 9 clocks (where m is the multiplier) e. An exception may occur, depending on the value of the operand.
f.LOCK# is automatically asserted, regardless of the presence or absence of the LOCK# prefix.
g.LOCK # is asserted during descriptor table accesses.
Notes h through r apply to 80386 Protected Virtual Address Mode only:
h. Exception 13 fault (general protection violation) will occur if the memory operand in CS, OS, ES, FS or GS cannot be used due to either a segment limit violation or access rights violation. If a stack limit is violated, an exception 12 (stack segment limit violation or not present) occurs.
i. For segment load operations, the CPL, RPL, and OPL must agree with the privilege rules to avoid an exception 13 fault (general protection violation). The segment'sdescriptor must indicate "present" or exception 11 (CS, OS, ES, FS, GS not present). If the SS register is loaded and a stack segment not present is detected, an exception 12 (stack segment limit violation or not present) occurs.
j. All segment descriptor accesses in the GOT or LOT made by this instruction will automatically assert LOCK# to maintain descriptor integrity in multiprocessor systems.
k. JMP, CALL, INT, RET and IRET instructions referring to another code segment will cause an exception 13 (general protection violation) if an applicable privilege rule is violated.
I. An exception 13 fault occurs if CPL is greater than 0 (0 is the most privileged level). m. An exception 13 fault occurs if CPL is greater than IOPL.
n. The IF bit of the flag register is not updated if CPL is greater than IOPL. The IOPL and VM fields of the flag register are updated only if CPL = O.
o. The PE bit of the MSW (CRO) cannot be reset by this instruction. Use MOV into CRO if desiring to reset the PE bit.
p. Any violation of privilege rules as applied to the selector operand does not cause a protection exception; rather, the zero flag is cleared.
q. If the coprocessor'smemory operand violates a segment limit or segment access rights, an exception 13 fault (general protection exception) will occur before the ESC instruction is executed. An exception 12 fault (stack segment limit violation or not present) will occur if the stack limit is violated by the operand'sstarting address.
r. The destination of a JMP, CALL, INT, RET or IRET must be in the defined limit of a code segment or an exception 13 fault (general protection violation) will occur.
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