80386

In Virtual 8086 Mode, a slightly different set of in- structions are made 10PL-sensitive. The following in- structions are 10PL-sensitive in Virtual 8086 Mode:

INT n; STI;

PUSHF; eLI;

POPF; IRET

The PUSHF, POPF, and IRET instructions are 10PL- sensitive in Virtual 8086 Mode only. This provision allows the IF flag (interrupt enable flag) to be virtual- ized to the Virtual 8086 Mode program. The INT n software interrupt instruction is also 10PL-sensitive in Virtual 8086 Mode. Note, however, that the INT 3 (opcode OCCH), INTO, and BOUND instructions are not 10PL-sensitive in Virtual 8086 mode (they aren't 10PL sensitive in Protected Mode either).

EXAMPLE OF BITMAP FOR I/O PORTS 0-255: Setting the TSS limit to {biLMap_Offset + 31

+1"l [0' see note below] will allow a 32-byte bit- map for the I/O ports #0-255, plus a terminator byte of all 1's[" see note below]. This allows the I/O bitmap to control I/O Permission to I/O port 0- 255 while causing an exception 13 fault on attempt- ed I/O to any I/O port 256 through 65,565.

"IMPORTANT IMPLEMENTATION NOTE: Beyond the last byte of I/O mapping information in the I/O Permission Bitmap must be a byte containing all 1'so The byte of all 1'smust be within the limit of the 386 TSS segment (see Figure 4-15a).

4.6.5 Interrupt Handling

Note that the I/O instructions (IN, OUT, INS, OUTS, REP INS, and REP OUTS) are not 10PL-sensitive in Virtual 8086 mode. Rather, the I/O instructions be- come automatically sensitive to the I/O Permission Bitmap contained in the 386 Task State Segment. The I/O Permission Bitmap, automatically used by the 80386 in Virtual 8086 Mode, is illustrated by Fig- ures 4.15a and 4-15b.

The I/O Permission Bitmap can be viewed as a 0- 64 Kbit bit string, which begins in memory at offset BiLMap_Offset in the current TSS. the 16-bit pointer BiLMap_Offset (15:0) is found in the word beginning at offset 66H (102 decimal) from the TSS base, as shown in Figure 4-15a.

Each bit in the I/O Permission Bitmap corresponds to a single byte-wide I/O port, as illustrated in Figure 4-15a. If a bit is 0, I/O to the corresponding byte- wide port can occur without generating an excep- tion. Otherwise the I/O instruction causes an excep- tion 13 fault. Since every byte-wide I/O port must be protectable, all bits corresponding to a word-wide or dword-wide port must be a for the word-wide or dword-wide I/O to.be permitted. If all the referenced bits are 0, the I/O will be allowed. If any referenced bits are 1, the attempted I/O will cause an exception 13 fault.

Due to the use of a pointer to the base of the I/O Permission Bitmap, the bitmap may be located any- where within the TSS, or may be ignored completely by pointing the BiLMap_Offset (15:0) beyond the limit of the TSS segment. In the same manner, only a small portion of the 64K I/O space need have an associated map bit, by adjusting the TSS limit to truncate the bitmap. This eliminates the commitment of 8K of memory when a complete bitmap is not required, while allowing the fully general case if de- sired.

In order to fully support the emulation of an 8086 machine, interrupts in Virtual 8086 Mode are han- dled in a unique fashion. When running in Virtual Mode all interrupts and exceptions involve a privi- lege change back to the host 80386 operating sys- tem. The 80386 operating system determines if the interrupt comes from a Protected Mode application or from a Virtual Mode program by examining the VM bit in the EFLAGS image stored on the stack.

When a Virtual Mode program is interrupted and ex- ecution passes to the interrupt routine at level 0, the VM bit is cleared. However, the VM bit is still set in the EFLAG image on the stack.

The 80386 operating system in turn handles the ex- ception or interrupt and then returns control to the 8086 program. The 80386 operating system may choose to let the 8086 operating system handle the interrupt or it may emulate the function of the inter- rupt handler. For example, many 8086 operating system calls are accessed by PUSHing parameters on the stack, and then executing an INT n instruc- tion. If the 10PL is set to a then all INT n instructions will be intercepted by the 80386 operating system. The 80386 operating system could emulate the 8086 operating system'scall. Figure 4-25 shows how the 80386 operating system could intercept an 8086 operating system'scall to "Open a File".

An 80386 operating system can provide a Virtual 8086 Environment which is totally transparent to the application software via intercepting and then emu- lating 8086 operating system'scalls, and intercept- ing IN and OUT instructions.

4.6.6Entering and Leaving Virtual

8086 Mode

Virtual 8086 mode is entered by executing an IRET instruction (at CPL=O), or Task Switch (at any CPL) to a 386 task whose 386 TSS has a FLAGS image containing a 1 in the VM bit position while the proc-

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Intel 80386 manual Interrupt Handling, Entering and Leaving Virtual