Intel 80386 manual

80386

HIGH PERFORMANCE 32-BIT MICROPROCESSOR

WITH ~NTEGRATED MEMORY MANAGEMENT

l!II Flexible 32-Bit Microprocessor

-8, 16, 32-Bit Data Types

-8 General Purpose 32-Bit Registers

[;'] Very Large Address Space

-4 Gigabyte Physical

-64 Terabyte Virtual

-4 Gigabyte Maximum Segment Size

oIntegrated Memory Management Unit

-Virtual Memory Support

-Optional On-Chip Paging

-4 Levels of Protection

-Fully Compatible with 80286

oObject Code Compatible with All 8086 Family Microprocessors

oVirtual 8086 Mode Allows Running of 8086 Software in a Protected and Paged System

IIIHardware Debugging Support

III Optimized for System Performance

-Pipelined Instruction Execution

-On-Chip Address Translation Caches -12.5 and 16 MHz Clock

-32 Megabytes/Sec Bus Bandwidth

oHigh Speed Numerics Support via 80287 and 80387 Coprocessors

oComplete System Development Support

-Software: C, PLlM, Assembler System Generation Tools

-Debuggers: PSCOPE, ICETM-386

o High Speed CHMOS III Technology

o 132 Pin Grid Array Package

(See Packaging Specification, Order #231369)

The 80386 is an advanced 32-bit microprocessor designed for applications needing very high performance and optimized for multitasking operating systems. The 32-bit registers and data paths support 32-bit addresses and data types. The processor addresses up to four gigabytes of physical memory and 64 terabytes (2**46) of virtual memory. The integrated memory management and protection architecture includes address translation registers, advanced multitasking hardware and a protection mechanism to support operating systems. In addition, the 80386 allows the simultaneous running of multiple operating systems.

Instruction pipelining, on-chip address translation, and high bus bandwidth ensure short average instruction execution times and high system throughput. The 80386 processor is capable of execution at sustained rates of between 3 and 4 million instructions per second.

The 80386 offers new testability and debugging features. Testability features include a self-test and direct access to the page translation cache. Four new breakpoint registers provide breakpoint traps on code execu- tion or data accesses, for powerful debugging of even ROM-based systems.

Object-code compatibility with all iAPX 86 family members (8086, 8088, 80186, 80188, 80286) means the 80386 offers immediate access to the world'slargest microprocessor software base.

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231630-49

Figure 1-1.80386 Pipelined 32-Bit Microarchitecture

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Intel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product. No other circuit patent

licenses are implied. Information contained herein supersedes previously published specifications on these devices from Intel. April 1986 © Intel Corporation, 1986