Intel 80386 manual Descriptors, Byte, Address, Segment Base 15 Segment Limit 15, Limit DPL S Type

inter80386

4.3.3.2 GLOBAL DESCRIPTOR TABLE

The Global Descriptor Table (GDT) contains de- scriptors which are possibly available to all of the tasks in a system. The GDT can contain any type of segment descriptor except for descriptors which are used for servicing interrupts (Le. interrupt and trap descriptors). Every 3B6 system contains a GDT. Generally the GDT contains code and data seg- ments used by the operating systems and task state segments, and descriptors for the LDTs in a system.

The first slot of the Global Descriptor Table corre- sponds to the null selector and is not used. The null selector defines a null pointer value.

4.3.3.3 LOCAL DESCRIPTOR TABLE

LDTs contain descriptors which are associated with a given task. Generally, operating systems are de- signed so that each task has a separate LDT. The LDT may contain only code, data, stack, task gate, and call gate descriptors. LDTs provide a mecha- nism for isolating a given task'scode and data seg- ments from the rest of the operating system, while the GDT contains descriptors for segments which are common to all tasks. A segment cannot be ac- cessed by a task if its segment descriptor does not exist in either the current LDT or the GDT. This pro- vides both isolation and protection for a task'sseg- ments, while still allowing global data to be shared among tasks.

Unlike the 6 byte GDT or IDT registers which contain a base address and limit, the visible portion of the LDT register contains only a 16-bit selector. This se- lector refers to a Local Descriptor Table descriptor in the GDT.

4.3.3.4 INTERRUPT DESCRIPTOR TABLE

The third table needed for B03B6 systems is the In- terrupt Descriptor Table. (See Figure 4-4.) The IDT contains the descriptors which point to the location of up to 256 interrupt service routines. The IDT may contain only task gates, interrupt gates, and trap gates. The IDT should be at least 256 bytes in size in order to hold the descriptors for the 32 Intel Re- served Interrupts. Every interrupt used by a system must have an entry in the IDT. The IDT entries are referenced via INT instructions, external interrupt vectors, and exceptions. (See 2.9 Interrupts).

	"\,	MEMORY	"\.,.,
	r		~
		GATE FOR
		INTERRUPT #n
	S	GATE FOR
		INTERRUPT #n·1
			INTERRUPT
			DESCRIPTOR
CPU			TABLE
		FOR	(IDT)
"	0	GATE·

~INTERRUPT #1 GATE FOR

INTERRUPT #0

I lOT BASE

32	0	~
	-C

231630-58

Figure 4-4. Interrupt Descriptor

Table Register Use

4.3.4Descriptors

4.3.4.1DESCRIPTOR ATTRIBUTE BITS

The object to which the segment selector points to is called a descriptor. Descriptors are eight byte quantities which contain attributes about a given re- gion of linear address space (Le. a segment). These

31									o	BYTE
										ADDRESS
SEGMENT BASE 15 ... 0						SEGMENT LIMIT 15 ... 0				o
BASE 31 ... 24		G D	0	0	LIMIT	P DPL S	TYPE	A	BASE	+4
					19 ... 16				23 ... 16
						I	I I
BASE	Base Address of the segment
LIMIT	The length of the segment		0 = Not Present
P	Present Bit	1= Present
DPL	Descriptor Privilege Level 0-3

SSegment Descriptor 0 = System Descriptor 1= Code or Data Segment Descriptor

TYPE Type of Segment

A Accessed Bit

G	Granularity Bit t = Segment length is page granular 0 = Segment length is byte granular
D	Default Operation Size (recognized in code segment descriptors only) 1= 32·bitsegment 0 = 16·bitsegment
o	Bit must be zero (0) for compatibility with future processors
	Figure 4·5. Segment Descriptors

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