![](/images/new-backgrounds/1312008/312008101x1.webp)
Intel® NetStructureTMZT 7102 Chassis Management Module
6.8BIST Test Descriptions
6.8.1Flash Checksum Test
This test is targeted to verify the RedBoot image and FPGA image are not corrupted.This test will calculate the CRC32 checksum from the RedBoot image, and then compare with the image checksum stored in the FIS directory. If one mismatches another, BIST will switch to the backup image. If checksum mismatch was found from the FPGA image, BIST will load the backup image to program the FPGA device.
6.8.2Base Memory Test
This test will write the data pattern of 55AA55AA into every
6.8.3Extended Memory Tests
6.8.3.1Walking Ones Test
This test is targeted to verify the data bus wiring by testing the bus one bit at a time. The data bus passes the test if each data bit can be set to 0 and 1 independently of the other data bits.
6.8.3.232-Bit Address Test
This test is targeted to verify the address bus wiring. The smallest set of addresses that will cover all possible combinations is the set of
Note that not all of the address lines can be tested in this way. Part of the
To confirm that no two memory locations overlap, first write some initial data value at each
6.8.3.332-Bit Inverse Address Test
This test is similar to the
Technical Product Specification | 51 |