Intel® NetStructureTMZT 7102 Chassis Management Module
6.5Late-BIST
Figure 10 shows at which times during the boot cycle the various stages of BIST are performed.
Figure 10. Timing of BIST Stages
HAL initialization (processor, cache, serial port)
FPGA
programming
Memory
parameters
initialization
Module
initialization
(flash, zlib, ide)
Module
initialization
(ethernet interface)
Display copyright
banner, and
execute boot script
Done
6.6Event Log Area and Event Management
Errors detected by the BIST are stored in an event log. The
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