Control Logic Block

Table 12-7. Correction Methods

Current Correction Bits

Correction Method

ISENS1 and ISENS0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

00

 

 

Bits IPOL1, IPOL2, and IPOL3 are used for correction.

01

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Current sensing on pins

 

 

 

and

 

occurs during the

10

 

 

IS1,

IS2,

IS3

 

 

dead-time.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Current sensing on pins

 

 

 

and

 

occurs at the half

 

 

 

IS1,

IS2,

IS3

11

 

 

cycle in center-aligned mode and at the end of the cycle in

 

 

 

edge-aligned mode.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1.The polarity of the ISx pin is latched when both the top and bottom PWMs are off. At the 0% and 100% duty cycle boundaries, there is no dead-time, so no new current value is sensed.

2.Current is sensed even with 0% and 100% duty cycle.

NOTE

The ISENSx bits are not buffered. Changing the current sensing method can affect the present PWM cycle.

LDOK— Load OK Bit

This read/write bit loads the prescaler bits of the PMCTL2 register and the entire PMMODH/L and PWMVALH/L registers into a set of buffers. The buffered prescaler divisor, PWM counter modulus value, and PWM pulse will take effect at the next PWM load. Set LDOK by reading it when it is logic 0 and then writing a logic 1 to it. LDOK is automatically cleared after the new values are loaded or can be manually cleared before a reload by writing a 0 to it. Reset clears LDOK.

1 = Load prescaler, modulus, and PWM values.

0 = Do not load new modulus, prescaler, and PWM values.

NOTE

The user should initialize the PWM registers and set the LDOK bit before enabling the PWM.

A PWM CPU interrupt request can still be generated when LDOK is 0.

PWMEN — PWM Module Enable Bit

This read/write bit enables and disables the PWM generator and the PWM pins. When PWMEN is clear, the PWM generator is disabled and the PWM pins are in the high-impedance state (unless OUTCTL = 1).

When the PWMEN bit is set, the PWM generator and PWM pins are activated. For more information, see 12.7 Initialization and the PWMEN Bit.

1 = PWM generator and PWM pins enabled

0 = PWM generator and PWM pins disabled

MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1

Freescale Semiconductor

147

Page 147
Image 147
Freescale Semiconductor MC68HC908MR16, MC68HC908MR32 manual LDOK- Load OK Bit, Pwmen PWM Module Enable Bit

MC68HC908MR16, MC68HC908MR32 specifications

Freescale Semiconductor's MC68HC908MR32 and MC68HC908MR16 microcontrollers are part of the popular HC08 family, designed primarily for embedded applications. These microcontrollers are particularly favored in automotive, industrial, and consumer product sectors due to their reliability and versatility.

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The MC68HC908MR32 variant is equipped with 32KB of flash memory, which allows for the storage of complex programs and extensive data handling. In contrast, the MC68HC908MR16 features 16KB of flash memory, making it ideal for simpler applications. Both microcontrollers also come with 1KB of RAM, enabling efficient data processing and real-time operations.

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