Freescale Semiconductor MC68HC908MR16 Data Direction Register E, Port E Pin Functions, Read Write

Port E

10.6.2 Data Direction Register E

Data direction register E (DDRE) determines whether each port E pin is an input or an output. Writing a logic 1 to a DDRE bit enables the output buffer for the corresponding port E pin; a logic 0 disables the output buffer.

Address:

Read:

Write:

Reset:

$000C
Bit 7	6	5	4	3	2	1	Bit 0
DDRE7	DDRE6	DDRE5	DDRE4	DDRE3	DDRE2	DDRE1	DDRE0
0	0	0	0	0	0	0	0

Figure 10-14. Data Direction Register E (DDRE)

DDRE[7:0] — Data Direction Register E Bits

These read/write bits control port E data direction. Reset clears DDRE[7:0], configuring all port E pins as inputs.

1 = Corresponding port E pin configured as output

0 = Corresponding port E pin configured as input

NOTE

Avoid glitches on port E pins by writing to the port E data register before changing data direction register E bits from 0 to 1.

Figure 10-15shows the port E I/O logic.

INTERNAL DATA BUS

READ DDRE ($000C)

WRITE DDRE ($000C)

DDREx

RESET

WRITE PTE ($0008)

PTEx

READ PTE ($0008)

PTEx

Figure 10-15. Port E I/O Circuit

When bit DDREx is a logic 1, reading address $0008 reads the PTEx data latch. When bit DDREx is a logic 0, reading address $0008 reads the voltage level on the pin. The data latch can always be written, regardless of the state of its data direction bit. Table 10-5summarizes the operation of the port E pins.

Table 10-5. Port E Pin Functions

DDRE Bit	PTE Bit	I/O Pin Mode	Accesses to DDRE	Accesses to PTE
			Read/Write	Read	Write
0	X(1)	Input, Hi-Z(2)	DDRE[7:0]	Pin	PTE[7:0](3)
1	X	Output	DDRE[7:0]	PTE[7:0]	PTE[7:0]

1.X = don’t care

2.Hi-Z = high impedance

3.Writing affects data register, but does not affect input.

MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1

Freescale Semiconductor 109