Freescale Semiconductor MC68HC908MR16 manual Control, Status, and Data Registers Summary Sheet 8

Memory Map

Addr. Register Name Bit 7 6 5 4 3 2 1 Bit 0

	SIM Break Status Register	Read:
$FE00	(SBSR)	Write:
	See page 191.	Reset:
	SIM Reset Status Register	Read:
$FE01	(SRSR)	Write:
	See page 192.	Reset:
	SIM Break Flag Control	Read:
$FE03	Register (SBFCR)	Write:
	See page 193.	Reset:
	FLASH Control Register	Read:
$FE08	(FLCR)	Write:
	See page 38.
		Reset:
	Break Address Register High	Read:
$FE0C	(BRKH)	Write:
	See page 254.	Reset:
	Break Address Register Low	Read:
$FE0D	(BRKL)	Write:
	See page 254.	Reset:
	Break Status and Control	Read:
$FE0E	Register (BRKSCR)	Write:
	See page 254.	Reset:
	LVI Status and Control Register	Read:
$FE0F	(LVISCR)	Write:
	See page 99.	Reset:
	FLASH Block Protect Register	Read:
$FF7E	(FLBPR)	Write:
	See page 43.	Reset:

	COP Control Register	Read:
$FFFF	(COPCTL) Write:
	See page 77.	Reset:
U = Unaffected	X = Indeterminate

R	R	R	R	R	R	BW	R
						0
POR	PIN	COP	ILOP	ILAD	MENRST	LVI	0
R	R	R	R	R	R	R	R
1	0	0	0	0	0	0	0
BCFE	R	R	R	R	R	R	R
0
0	0	0	0	HVEN	MASS	ERASE	PGM
0	0	0	0	0	0	0	0
Bit 15	14	13	12	11	10	9	Bit 8
0	0	0	0	0	0	0	0
Bit 7	6	5	4	3	2	1	Bit 0
0	0	0	0	0	0	0	0
BRKE	BRKA	0	0	0	0	0	0
0	0	0	0	0	0	0	0
LVIOUT	0	TRPSEL	0	0	0	0	0
R	R		R	R	R	R	R
0	0	0	0	0	0	0	0
BPR7	BPR6	BPR5	BPR4	BPR3	BPR2	BPR1	BPR0
0	0	0	0	0	0	0	0

Low byte of reset vector

Clear COP counter

Unaffected by reset

R = Reserved Bold = Buffered = Unimplemented

Figure 2-2. Control, Status, and Data Registers Summary (Sheet 8 of 8)

MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1

Freescale Semiconductor 35