Freescale Semiconductor MC68HC908MR16 manual 13.7 I/O Registers, 13.6.2 PTF4/RxD Receive Data

I/O Registers

13.6.2 PTF4/RxD (Receive Data)

The PTF4/RxD pin is the serial data input to the SCI receiver. The SCI shares the PTF4/RxD pin with port F. When the SCI is enabled, the PTF4/RxD pin is an input regardless of the state of the DDRF4 bit in data direction register F (DDRF).

13.7 I/O Registers

These I/O registers control and monitor SCI operation:

•SCI control register 1 (SCC1)

•SCI control register 2 (SCC2)

•SCI control register 3 (SCC3)

•SCI status register 1 (SCS1)

•SCI status register 2 (SCS2)

•SCI data register (SCDR)

•SCI baud rate register (SCBR)

13.7.1 SCI Control Register 1

SCI control register 1 (SCC1):

•Enables loop-mode operation

•Enables the SCI

•Controls output polarity

•Controls character length

•Controls SCI wakeup method

•Controls idle character detection

•Enables parity function

•Controls parity type

Address:	$0038
	Bit 7	6	5	4	3	2	1	Bit 0
Read:
	LOOPS	ENSCI	TXINV	M	WAKE	ILTY	PEN	PTY
Write:
Reset:	0	0	0	0	0	0	0	0

Figure 13-8. SCI Control Register 1 (SCC1)

LOOPS — Loop Mode Select Bit

This read/write bit enables loop mode operation. In loop mode the PTF4/RxD pin is disconnected from the SCI, and the transmitter output goes into the receiver input. Both the transmitter and the receiver must be enabled to use loop mode. Reset clears the

LOOPS bit.

1 = Loop mode enabled

0 = Normal operation enabled

MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1

Freescale Semiconductor 169