Freescale Semiconductor MC68HC908MR16, MC68HC908MR32 PWMx Value Registers, Control Logic Block

Control Logic Block

12.9.3 PWMx Value Registers

Each of the six PWMs has a 16-bit PWM value register.

Read:

Write:

Reset:

Bit 7	6	5	4	3	2	1	Bit 0
Bit 15	Bit 14	Bit 13	Bit 12	Bit 11	Bit 10	Bit 9	Bit 8
0	0	0	0	0	0	0	0
Bold	= Buffered

Figure 12-37. PWMx Value Registers High (PVALxH)

Read:

Write:

Reset:

Bit 7	6	5	4	3	2	1	Bit 0
Bit 7	Bit 6	Bit 5	Bit 4	Bit 3	Bit 2	Bit 1	Bit 0
0	0	0	0	0	0	0	0
Bold	= Buffered

Figure 12-38. PWMx Value Registers Low (PVALxL)

The 16-bit signed value stored in this register determines the duty cycle of the PWM. The duty cycle is defined as: (PWM value/modulus) x 100.

Writing a number less than or equal to 0 causes the PWM to be off for the entire PWM period. Writing a number greater than or equal to the 12-bit modulus causes the PWM to be on for the entire PWM period.

If the complementary mode is selected, the PWM pairs share PWM value registers.

To avoid erroneous PWM pulses, this value is buffered and will not be used by the PWM generator until the LDOK bit has been set and the next PWM load cycle begins.

NOTE

When reading these registers, the value read is the buffer (not necessarily the value the PWM generator is currently using).

MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1

Freescale Semiconductor 145