Serial Communications Interface Module (SCI)

In applications that are subject to software latency or in which it is important to know which byte is lost due to an overrun, the flag-clearing routine can check the OR bit in a second read of SCS1 after reading the data register.

NF — Receiver Noise Flag Bit

This clearable, read-only bit is set when the SCI detects noise on the PTF4/RxD pin. NF generates an NF CPU interrupt request if the NEIE bit in SCC3 is also set. Clear the NF bit by reading SCS1 and then reading the SCDR. Reset clears the NF bit.

1 = Noise detected

0 = No noise detected

FE — Receiver Framing Error Bit

This clearable, read-only bit is set when a 0 is accepted as the stop bit. FE generates an SCI error CPU interrupt request if the FEIE bit in SCC3 also is set. Clear the FE bit by reading SCS1 with FE set and then reading the SCDR. Reset clears the FE bit.

1 = Framing error detected

0 = No framing error detected

PE — Receiver Parity Error Bit

This clearable, read-only bit is set when the SCI detects a parity error in incoming data. PE generates a PE CPU interrupt request if the PEIE bit in SCC3 is also set. Clear the PE bit by reading SCS1 with PE set and then reading the SCDR. Reset clears the PE bit.

1 = Parity error detected

0 = No parity error detected

13.7.5 SCI Status Register 2

SCI status register 2 (SCS2) contains flags to signal these conditions:

Break character detected

Incoming data

Address:

$003C

 

 

 

 

 

 

 

 

Bit 7

6

5

4

3

2

1

Bit 0

 

 

 

 

 

 

 

 

 

Read:

0

0

0

0

0

0

BKF

RPF

 

 

 

 

 

 

 

 

 

Write:

R

R

R

R

R

R

R

R

 

 

 

 

 

 

 

 

 

Reset:

0

0

0

0

0

0

0

0

R

= Reserved

Figure 13-13. SCI Status Register 2 (SCS2)

BKF — Break Flag

This clearable, read-only bit is set when the SCI detects a break character on the PTF4/RxD pin. In SCS1, the FE and SCRF bits are also set. In 9-bit character transmissions, the R8 bit in SCC3 is cleared. BKF does not generate a CPU interrupt request. Clear BKF by reading SCS2 with BKF set and then reading the SCDR. Once cleared, BKF can become set again only after logic 1s again appear on the PTF4/RxD pin followed by another break character. Reset clears the BKF bit.

1 = Break character detected

0 = No break character detected

MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1

176

Freescale Semiconductor

Page 176
Image 176
Freescale Semiconductor MC68HC908MR32, MC68HC908MR16 manual NF Receiver Noise Flag Bit, FE Receiver Framing Error Bit

MC68HC908MR16, MC68HC908MR32 specifications

Freescale Semiconductor's MC68HC908MR32 and MC68HC908MR16 microcontrollers are part of the popular HC08 family, designed primarily for embedded applications. These microcontrollers are particularly favored in automotive, industrial, and consumer product sectors due to their reliability and versatility.

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