Freescale Semiconductor MC68HC908MR16, MC68HC908MR32 Tstop Timb Stop Bit, Trst Timb Reset Bit

I/O Registers

TSTOP — TIMB Stop Bit

This read/write bit stops the TIMB counter. Counting resumes when TSTOP is cleared. Reset sets the TSTOP bit, stopping the TIMB counter until software clears the TSTOP bit.

1 = TIMB counter stopped

0 = TIMB counter active

NOTE

Do not set the TSTOP bit before entering wait mode if the TIMB is required to exit wait mode. Also, when the TSTOP bit is set and the timer is configured for input capture operation, input captures are inhibited until TSTOP is cleared.

TRST — TIMB Reset Bit

Setting this write-only bit resets the TIMB counter and the TIMB prescaler. Setting TRST has no effect on any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIMB counter is reset and always reads as logic 0. Reset clears the TRST bit.

1 = Prescaler and TIMB counter cleared

0 = No effect

NOTE

Setting the TSTOP and TRST bits simultaneously stops the TIMB counter at a value of $0000.

PS[2:0] — Prescaler Select Bits

These read/write bits select either the PTE0/TCLKB pin or one of the seven prescaler outputs as the input to the TIMB counter as Table 17-1shows. Reset clears the PS[2:0] bits.

	Table 17-1. Prescaler Selection
PS[2:0]		TIMB Clock Source
000		Internal bus clock ⎟1
001		Internal bus clock ⎟ 2
010		Internal bus clock ⎟ 4
011		Internal bus clock ⎟ 8
100		Internal bus clock ⎟ 16
101		Internal bus clock ⎟ 32
110		Internal bus clock ⎟ 64
111		PTE0/TCLKB

MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1

Freescale Semiconductor 245