15.11 I/O Signals

Serial Peripheral Interface Module (SPI)

WRITE TO SPDR 1	3		8
		5
SPTE	2	5		10
SPSCK
SPSCK
CPHA:CPOL = 1:0

MOSI

MSBBIT BIT BIT BIT BIT BIT LSBMSBBIT BIT BIT BIT BIT BIT LSBMSBBIT BIT BIT
6	5	4	3	2	1	6	5	4	3	2	1	6	5	4

	BYTE 1		BYTE 2		BYTE 3
SPRF		4		9
SPRF		4		9

READ SPSCR		6		11
READ SPSCR		6		11

		7
READ SPDR		7		12

1	CPU WRITES BYTE 1 TO SPDR, CLEARING SPTE BIT.	7	CPU READS SPDR, CLEARING SPRF BIT.
2	BYTE 1 TRANSFERS FROM TRANSMIT DATA	8	CPU WRITES BYTE 3 TO SPDR, QUEUEING BYTE
	REGISTER TO SHIFT REGISTER, SETTING SPTE BIT.		3 AND CLEARING SPTE BIT.
3	CPU WRITES BYTE 2 TO SPDR, QUEUEING BYTE 2	9	SECOND INCOMING BYTE TRANSFERS FROM SHIFT
3	CPU WRITES BYTE 2 TO SPDR, QUEUEING BYTE 2		REGISTER TO RECEIVE DATA REGISTER, SETTING
	AND CLEARING SPTE BIT.		REGISTER TO RECEIVE DATA REGISTER, SETTING
	AND CLEARING SPTE BIT.		SPRF BIT.
			SPRF BIT.
4	FIRST INCOMING BYTE TRANSFERS FROM SHIFT	10	BYTE 3 TRANSFERS FROM TRANSMIT DATA
	REGISTER TO RECEIVE DATA REGISTER, SETTING		REGISTER TO SHIFT REGISTER, SETTING SPTE BIT.
5	SPRF BIT.	11	CPU READS SPSCR WITH SPRF BIT SET.
5	BYTE 2 TRANSFERS FROM TRANSMIT DATA	12	CPU READS SPDR, CLEARING SPRF BIT.
	REGISTER TO SHIFT REGISTER, SETTING SPTE BIT.	12	CPU READS SPDR, CLEARING SPRF BIT.
	REGISTER TO SHIFT REGISTER, SETTING SPTE BIT.
6	CPU READS SPSCR WITH SPRF BIT SET.

Figure 15-12. SPRF/SPTE CPU Interrupt Timing

15.10 Low-Power Mode

The WAIT instruction puts the MCU in a low power-consumption standby mode.

The SPI module remains active after the execution of a WAIT instruction. In wait mode the SPI module registers are not accessible by the CPU. Any enabled CPU interrupt request from the SPI module can bring the MCU out of wait mode.

If SPI module functions are not required during wait mode, reduce power consumption by disabling the SPI module before executing the WAIT instruction.

To exit wait mode when an overflow condition occurs, enable the OVRF bit to generate CPU interrupt requests by setting the error interrupt enable bit (ERRIE). See 15.7 Interrupts.

Since the SPTE bit cannot be cleared during a break with the BCFE bit cleared, a write to the transmit data register in break mode does not initiate a transmission nor is this data transferred into the shift register. Therefore, a write to the SPDR in break mode with the BCFE bit cleared has no effect.

The SPI module has five I/O pins and shares four of them with a parallel I/O port. The pins are:

•MISO — Data received

•MOSI — Data transmitted

•SPSCK — Serial clock

•SS — Slave select

MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1

208	Freescale Semiconductor

MC68HC908MR16, MC68HC908MR32 specifications

Freescale Semiconductor's MC68HC908MR32 and MC68HC908MR16 microcontrollers are part of the popular HC08 family, designed primarily for embedded applications. These microcontrollers are particularly favored in automotive, industrial, and consumer product sectors due to their reliability and versatility.

One of the standout features of the MC68HC908MR series is its CMOS technology, which enhances performance while minimizing power consumption. This makes these microcontrollers suitable for battery-operated devices. They operate at a maximum clock frequency of 2 MHz and offer a 16-bit architecture, providing a solid balance between processing power and efficiency.

The MC68HC908MR32 variant is equipped with 32KB of flash memory, which allows for the storage of complex programs and extensive data handling. In contrast, the MC68HC908MR16 features 16KB of flash memory, making it ideal for simpler applications. Both microcontrollers also come with 1KB of RAM, enabling efficient data processing and real-time operations.

Another significant characteristic of these microcontrollers is their integrated peripherals. They come with multiple input/output (I/O) pins, which allow for connectivity with various sensors and actuators. The built-in timer systems offer precise timing control for automotive and industrial applications, while the Analog-to-Digital Converter (ADC) provides essential conversion capabilities for various analog signals.

For communication purposes, the MC68HC908MR series includes a serial communication interface, enabling easy integration with other devices and systems. This versatility facilitates the development of complex systems that require interaction with external components.

Security is another crucial aspect of these microcontrollers. They have built-in fail-safe mechanisms to ensure reliable operation under various conditions, making them suitable for critical systems. Additionally, their robust architecture helps to safeguard against potential disruptions or attacks.

In summary, Freescale Semiconductor's MC68HC908MR32 and MC68HC908MR16 microcontrollers are key players in the embedded systems landscape. Their blend of power efficiency, integrated features, and scalability ensures they remain relevant for a wide array of applications, making them a favored choice among engineers and developers looking for dependable solutions in a competitive market.

Freescale Semiconductor MC68HC908MR32 manual 15.11 I/O Signals, SPRF/SPTE CPU Interrupt Timing

Models: MC68HC908MR16 MC68HC908MR32