Freescale Semiconductor MC68HC908MR16 PLL Bandwidth Control Register, PCTL30 Unimplemented Bits

CGM Registers

if the PLL is off. Therefore, PLLON cannot be cleared when BCS is set, and BCS cannot be set when PLLON is clear. If the PLL is off (PLLON = 0), selecting CGMVCLK requires two writes to the PLL control register. See 4.3.3 Base Clock Selector Circuit.

PCTL[3:0] — Unimplemented Bits

These bits provide no function and always read as logic 1s.

4.5.2 PLL Bandwidth Control Register

The PLL bandwidth control register (PBWC):

•Selects automatic or manual (software-controlled) bandwidth control mode

•Indicates when the PLL is locked

•In automatic bandwidth control mode, indicates when the PLL is in acquisition or tracking mode

•In manual operation, forces the PLL into acquisition or tracking mode

Address:	$005D
	Bit 7	6	5	4		3	2	1	Bit 0
Read:		LOCK				0	0	0	0
	AUTO		ACQ		XLD
Write:		R				R	R	R	R
Reset:	0	0	0	0		0	0	0	0
		= Reserved
	R

Figure 4-6. PLL Bandwidth Control Register (PBWC)

AUTO — Automatic Bandwidth Control Bit

This read/write bit selects automatic or manual bandwidth control. When initializing the PLL for manual operation (AUTO = 0), clear the ACQ bit before turning on the PLL. Reset clears the AUTO bit.

1 = Automatic bandwidth control

0 = Manual bandwidth control

LOCK — Lock Indicator Bit

When the AUTO bit is set, LOCK is a read-only bit that becomes set when the VCO clock, CGMVCLK, is locked (running at the programmed frequency). When the AUTO bit is clear, LOCK reads as logic 0 and has no meaning. Reset clears the LOCK bit.

1 = VCO frequency correct or locked

0 = VCO frequency incorrect or unlocked

ACQ — Acquisition Mode Bit

When the AUTO bit is set, ACQ is a read-only bit that indicates whether the PLL is in acquisition mode or tracking mode. When the AUTO bit is clear, ACQ is a read/write bit that controls whether the PLL is in acquisition or tracking mode.

In automatic bandwidth control mode (AUTO = 1), the last-written value from manual operation is stored in a temporary location and is recovered when manual operation resumes. Reset clears this bit, enabling acquisition mode.

1 = Tracking mode

0 = Acquisition mode

MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1

Freescale Semiconductor 67