512 Kbyte Flash Module (S12XFTX512K4V2)
BookTitle, Rev. 2.4
Freescale Semiconductor 119
All bits in the FCTL register are readable but are not writable.
The FCTL register is loaded from the Flash Configuration Field byte at global address 0x7F_FF0E during
the reset sequence, indicated by F in Figure 2-15.
2.3.2.9 Flash Address Registers (FADDR)
The FADDRHI and FADDRLO registers are the Flash address registers.
All FADDRHI and FADDRLO bits are readable but are not writable. After an array write as part of a
command write sequence, the FADDR registers will contain the mapped MCU address written.
2.3.2.10 Flash Data Registers (FDATA)
The FDATAHI and FDATALO registers are the Flash data registers.
Table 2-19. FCTL Field Descriptions
Field Description
7-0
NV[7:0]
Non volatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the Device User Guide for proper
use of the NV bits.
Module Base + 0x0008
76543210
R FADDRHI
W
Reset 00000000
= Unimplemented or Reserved
Figure 2-16. Flash Address High Register (FADDRHI)
Module Base + 0x0009
76543210
R FADDRLO
W
Reset 00000000
= Unimplemented or Reserved
Figure 2-17. Flash Address Low Register (FADDRLO)