Chapter 9 XGATE (S12XGATEV2)
MC9S12XDP512 Data Sheet, Rev. 2.11
Freescale Semiconductor 413
Operation
RD.L & IMM8RD.L
Performs a bit wise logical AND between the low byte of register RD and an immediate 8-Bit constant and
stores the result in the destination register RD.L. The high byte of RD is not affected.
CCR Effects
Code and CPU Cycles
ANDL Logical AND Immediate 8-Bit Constant
(Low Byte) ANDL
NZVC
∆∆0—
N: Set if bit 7 of the result is set; cleared otherwise.
Z: Set if the 8-Bit result is $00; cleared otherwise.
V: 0; cleared.
C: Not affected.
Source Form Address
Mode Machine Code Cycles
ANDL RD, #IMM8 IMM8 1 0 0 0 0 RD IMM8 P