Chapter 14 Freescale’s Scalable Controller Area Network (S12MSCANV3)
MC9S12XDP512 Data Sheet, Rev. 2.11
Freescale Semiconductor 621
Table 14-1. MSCAN Memory Map
Offset
Address Register Access
0x0000 MSCAN Control Register 0 (CANCTL0) R/W1
1Refer to detailed register description for write access restrictions on per bit basis.
0x0001 MSCAN Control Register 1 (CANCTL1) R/W1
0x0002 MSCAN Bus Timing Register 0 (CANBTR0) R/W
0x0003 MSCAN Bus Timing Register 1 (CANBTR1) R/W
0x0004 MSCAN Receiver Flag Register (CANRFLG) R/W1
0x0005 MSCAN Receiver Interrupt Enable Register (CANRIER) R/W
0x0006 MSCAN Transmitter Flag Register (CANTFLG) R/W1
0x0007 MSCAN Transmitter Interrupt Enable Register (CANTIER) R/W1
0x0008 MSCAN Transmitter Message Abort Request Register (CANTARQ) R/W1
0x0009 MSCAN Transmitter Message Abort Acknowledge Register (CANTAAK) R
0x000A MSCAN Transmit Buffer Selection Register (CANTBSEL) R/W1
0x000B MSCAN Identifier Acceptance Control Register (CANIDAC) R/W1
0x000C RESERVED
0x000D MSCAN Miscellaneous Register (CANMISC) R/W1
0x000E MSCAN Receive Error Counter (CANRXERR) R
0x000F MSCAN Transmit Error Counter (CANTXERR) R
0x0010 MSCAN Identifier Acceptance Register 0(CANIDAR0) R/W
0x0011 MSCAN Identifier Acceptance Register 1(CANIDAR1) R/W
0x0012 MSCAN Identifier Acceptance Register 2 (CANIDAR2) R/W
0x0013 MSCAN Identifier Acceptance Register 3 (CANIDAR3) R/W
0x0014 MSCAN Identifier Mask Register 0 (CANIDMR0) R/W
0x0015 MSCAN Identifier Mask Register 1 (CANIDMR1) R/W
0x0016 MSCAN Identifier Mask Register 2 (CANIDMR2) R/W
0x0017 MSCAN Identifier Mask Register 3 (CANIDMR3) R/W
0x0018 MSCAN Identifier Acceptance Register 4 (CANIDAR4) R/W
0x0019 MSCAN Identifier Acceptance Register 5 (CANIDAR5) R/W
0x001A MSCAN Identifier Acceptance Register 6 (CANIDAR6) R/W
0x001B MSCAN Identifier Acceptance Register 7 (CANIDAR7) R/W
0x001C MSCAN Identifier Mask Register 4 (CANIDMR4) R/W
0x001D MSCAN Identifier Mask Register 5 (CANIDMR5) R/W
0x001E MSCAN Identifier Mask Register 6 (CANIDMR6) R/W
0x001F MSCAN Identifier Mask Register 7 (CANIDMR7) R/W
0x0020
-0x002F
Foreground Receive Buffer (CANRXFG) R2
2Reserved bits and unused bits within the TX- and RX-buffers (CANTXFG, CANRXFG) will be read
as “x”, because of RAM-based implementation.
0x0030
-0x003F
Foreground Transmit Buffer (CANTXFG) R2/W