Freescale Semiconductor MC9S12XDP512 11.3.2.31 Timer Input Capture Holding Registers 03 (TCxH)

Chapter 11 Enhanced Capture Timer (S12MC9S12XDP51216B8CV2)
MC9S12XDP512 Data Sheet, Rev. 2.11
Freescale Semiconductor 547
11.3.2.31 Timer Input Capture Holding Registers 0–3 (TCxH)
Module Base + 0x0038
15 14 13 12 11 10 9 8
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8
W
Reset 00000000
= Unimplemented or Reserved
Figure 11-57. Timer Input Capture Holding Register 0 High (TC0H)
Module Base + 0x0039
76543210
R TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
Reset 00000000
= Unimplemented or Reserved
Figure 11-58. Timer Input Capture Holding Register 0 Low (TC0H)
Module Base + 0x003A
15 14 13 12 11 10 9 8
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8
W
Reset 00000000
= Unimplemented or Reserved
Figure 11-59. Timer Input Capture Holding Register 1 High (TC1H)
Module Base + 0x003B
76543210
R TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
Reset 00000000
= Unimplemented or Reserved
Figure 11-60. Timer Input Capture Holding Register 1 Low (TC1H)
Module Base + 0x003C
15 14 13 12 11 10 9 8
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8
W
Reset 00000000
= Unimplemented or Reserved
Figure 11-61. Timer Input Capture Holding Register 2 High (TC2H)