Chapter 20 Debug (S12XDBGV2)
MC9S12XDP512 Data Sheet, Rev. 2.11
792 Freescale Semiconductor
20.1.2 Features
Four comparators (A, B, C, and D):
Comparators A and C compare the full address and the full 16-bit data bus
Comparators A and C feature a data bus mask register
Comparators B and D compare the full address bus only
Each comparator can be configured to monitor either CPU or XGATE busses
Each comparator features control of R/W and byte/word access cycles
Comparisons can be used as triggers for the state sequencer
Three comparator modes:
Simple address/data comparator match mode
Inside address range mode, Addmin Address Addmax
Outside address range match mode, Address <Addmin or Address > Addmax
Two types of triggers:
Tagged: triggers just before a specific instruction begins execution
Force: triggers on the first instruction boundary after a match occurs.
Three types of breakpoints:
CPU breakpoint entering BDM on breakpoint (BDM)
CPU breakpoint executing SWI on breakpoint (SWI)
XGATE breakpoint
Three trigger modes independent of comparators:
External instruction tagging (associated with CPU instructions only)
XGATE S/W breakpoint request
TRIG bit immediate software trigger
Three trace modes:
Normal: change of flow (COF) bus information is stored (see Section 20.4.5.2.1, “Normal
Mode”) for change of flow definition.
Loop1: same as normal but inhibits consecutive duplicate source address entries
Detail: address and data for all cycles except free cycles and opcode fetches are stored
4-stage state sequencer for trace buffer control:
Tracing session trigger linked to final state of state sequencer
Begin, end, and mid alignment of tracing to trigger
20.1.3 Modes of Operation
The DBG module can be used in all MCU functional modes.
During BDM hardware accesses and when the BDM module is active, CPU monitoring is disabled. Thus
breakpoints, comparators and bus tracing mapped to the CPU are disabled but accessing the DBG registers,
including comparator registers, is still possible. While in active BDM or during hardware BDM accesses,