Registers
http://www.motorola.com/computer/literature 2-77
2
Hardware Control-Status/Prescaler Adjust RegisterThe Hardware Control-Status Register (HCSR) provides hardware specific control and status information for the PHB. The bits within the HCSR are defined as follows:XPRx PPC/PCI Clock Ratio. This is a read only field that is used to indicate the clock ratio that has been established by the PHB at the release of reset. The encoding of this field is shown in the following table.SPRQ Speculative PCI Request. If set, the PHB PCI Master will perform speculative PCI requesting when a PCI bound transaction has been retried due to bridge lock resolution. If cleared, the PCI Master will only request the PCI bus when a transaction is pending within the PHB FIFOs.Address $FEFF0010
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Name HCSR XPAD
XPR2
XPR1
XPR0
SPRQ
WLRT1
WLRT0
RLRT1
RLRT0
Operation
R
R
R
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
RR/W
Reset
0
0
0
0
0
X
X
X
0
0
0
1
0
0
0
0
$00 $9C
XPR PPC60x/PCI clock ratio
000 Undefined
001 1:1
010 2:1
011 3:1
100 3:2
101 Undefined
110 5:2
111 Undefined