3-50 Computer Group Literature Center Web Site
System Memory Controller (SMC)
3
Error Logger Register
elog When set, elog indicates that a single- or a multiple-bit
error has been logged by the SMC. If elog is set by a
multiple-bit error, then no more errors will be logged until
software clears it. If elog is set by a single-bit error, then
no more single-bit errors will be logged until software
clears it, however if elog is set by a single-bit error and a
multiple-bit error occurs, the multiple-bit er ror will be
logged and the single-bit error information overwritten.
elog can only be set by the logging of an error and cleared
by the writing of a one to itself or by power-up reset.
escb escb indicates the entity that was accessing SDRAM at
the last logging of a single- or multiple-bit error by the
SMC. If escb is 1, it indicates that the scrubber was
accessing SDRAM. If escb is 0, it indicates that the
PPC60x bus master was accessing SDRAM.
esen When set, esen allows errors that occur during s crubs to
be logged. When cleared, esen does not allow errors that
occur during scrubs to be logged.
embt embt is set by the logging of a multiple-bit error. It is
cleared by the logging of a single-bit error. It is undefin ed
after power-up reset. The syndrome code is meaningless
if its embt bit is set.
Address $FEF80030
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Name
elog
0
0
0
escb
esen
embt
esbt
ERR_SYNDROME
0
esblk0
esblk1
esblk2
0
0
0
scof
SBE_COUNT
Operation
R/C
R
R
R
R
R/W
R
R
READ ONLY
R
R
R
R
R
R
R
R/C
READ/WRITE
Reset
0 P
X
X
X
0 P
0 PL
0 P
0 P
0P
X
0P
0P
0P
X
X
X
0 P
0P