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System Memory Controller (SMC)
3
Figure 3-5. Programming Sequence for I2C Byte Write
READ
I
2
C
STATUS REG
CMPLT=1? N
Y
LOAD “WORD ADDR” TO
I
2
C
TRANSMITTER DATA REG
LOAD “DATA” TO
I
2
C
TRANSMITTER DATA REG
READ
I
2
C
STATUS REG
CMPLT=ACKIN=1? N
Y
READ
I
2
C
STATUS REG
CMPLT=ACKIN=1? N
Y
LOAD “$09” (START CONDITION) TO
I
2
C
CONTROL REG
LOAD “DEVICE ADDR+WR BIT” TO
I
2
C
TRANSMITTER DATA REG
READ
I
2
C
STATUS REG
CMPLT=ACKIN=1? N
Y
LOAD “$05” (STOP CONDITION) TO
I
2
C
CONTROL REG
LOAD “DUMMY DATA” TO
I
2
C
TRANSMITTER DATA REG
READ
I
2
C
STATUS REG
CMPLT=1? N
Y
START STOP
SDA S
B
M
DEVICE ADDR
W
R
A
C
K
WORD ADDR
A
C
K
DATA
A
C
K
ACK from Slave Device
END
BEGIN
*
*
*

(*)

:
Stop condition should be generated to abort the transfer after a software wait loop (~1ms) has been expired