Motorola MVME5100 Timer Destination Registers

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Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
2
Timer Destination Registers
This register indicates the destinations for this timer’s interrupts. Timer
interrupts operate in the Directed delivery interrupt mode. This register
may specify multiple destinations (multicast delivery).
P1 PROCESSOR 1. The interrupt is directed to processor 1.
P0 PROCESSOR 0. The interrupt is directed to processor 0.
External Source Vector/Priority Registers
Offset Timer 0 - $01130
Timer 1 - $01170
Timer 2 - $011B0
Timer 3 - $011F0
Bit 3
13 02 92 82 72 62 52 42 32 22 12 01 91 81 71 61 51 41 31 21 11 09876543210
Name TIMER DESTINATION
P1 P0
Operation RRRR
R/W R/W
Reset $00 $00 $00 $00
0
0
Offset Int Src 0 - $10000
Int Src 1-> Int Src15 - $10020 -> $101E0
Bit 3
13 02 92 82 72 62 52 42 32 22 12 01 91 81 71 61 51 41 31 21 11 09876543210
Name EXTERNAL SOURCE VECTOR/PRIORITY
MASK ACT POL SENSE
PRIOR VECTOR
Operation
R/W R
R
R/W R/W R R
R/W R R/W
Reset
1 0
$000
0 0 0 0
$0 $00 $00