Motorola MVME5100 Vendor Identification Register

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Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
2
Vendor Identification Register
There are two fields in the Vendor Identification Register which are not
defined for the MPIC implementation but are defined in the MPIC
specification. They are the vendor identification and device ID fields.
STP STEPPING.The stepping or silicon revision number of
Hawk’s MPIC.
Processor Init Register
P1 PROCESSOR 1. Writing a 1 to P1 will assert the Soft
Reset input of processor 1. Writing a 0 to it will negat e the
SRESET signal.
P0 PROCESSOR 0. Writing a 1 to P0 will assert the Soft
Reset input of processor 0. Writing a 0 to it will negat e the
SRESET signal.
The Soft Reset input to the 604 is negative edge-sensitive.
Offset $01080
Bit 3
13 02 92 82 72 62 52 42 32 22 12 01 91 81 71 61 51 41 31 21 11 09876543210
Name VENDOR IDENTIFICATION
STP
Operation RRRR
Reset $00 $00 $00 $00
Offset $01090
Bit 3
13 02 92 82 72 62 52 42 32 22 12 01 91 81 71 61 51 41 31 21 11 09876543210
Name PROCESSOR INIT
P1 P0
Operation RRRR
R/W
R/W
Reset $00 $00 $00 $00
0
0