viii
The Universe ASIC..........................................................................................1-17
PCI Configuration Space..................................................................................1-19
Hawk External Register Bus Address Assignments.........................................1-21
MVME5100 Hawk External Register Bus Summary...............................1-21
Dual TL16C550 UARTs...................................................................................1-23
Status Register..................................................................................................1-24
MODFAIL Bit Register....................................................................................1-25
MODRST Bit Register.....................................................................................1-26
TBEN Bit Register...........................................................................................1-27
NVRAM/RTC & Watchdog Timer...................................................................1-28
Software Readable Header/Switch Register (S1).............................................1-29
Geographical Address Register (VME board).................................................1-30
Extended Features Register 1...........................................................................1-31
Board Last Reset Register................................................................................1-32
Extended Features Register 2...........................................................................1-33
IPMC7xx ISA Bus Resources.................................................................................1-34
W83C554 PIB Registers..................................................................................1-34
PC87308VUL Super I/O (ISASIO) Strapping.................................................1-34
Z85230 ESCC and Z8536 CIO Registers and Port Pins..................................1-35
Z8536/Z85230 Registers...........................................................................1-35
Z8536 CIO Port Pins.................................................................................1-36
ISA DMA Channels.........................................................................................1-39
CHAPTER 2 Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
Introduction...............................................................................................................2-1
Overview............................................................................................................2-1
Features..............................................................................................................2-1
Block Diagram...........................................................................................................2-3
Functional Description..............................................................................................2-4
Architectural Overview......................................................................................2-4
PPC Bus Interface..............................................................................................2-5
PPC Address Mapping................................................................................2-6
PPC Slave....................................................................................................2-7
PPC FIFO....................................................................................................2-9
PPC Master................................................................................................2-10
PPC Arbiter...............................................................................................2-15
PPC Parity.................................................................................................2-17
PPC Bus Timer..........................................................................................2-18
PCI Bus Interface.............................................................................................2-19
PCI Address Mapping...............................................................................2-19