Motorola MVME5100 Hawk Internal Error Interrupt Destination Register

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Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
2
Hawk Internal Error Interrupt Destination Register
This register indicates the possible d estinations for the Hawk internal er ror
interrupt source. These interrupts operate in the Distributed interrupt
delivery mode.
P1 PROCESSOR 1. The interrupt is pointed to processor 1.
P0 PROCESSOR 0. The interrupt is pointed to processor 0.
Interprocessor Interrupt Dispatch Registers
There are four Interprocessor Interrupt Dispa tch Registers. Writing to an
IPI Dispatch Register with the P0 and/or P1 bit set causes an interprocessor
interrupt request to be sent to one or more pro cessors. Note that each IPI
Dispatch Register has two addresses. These registers are considered to be
per processor registers and there is one address per processor. Reading
these registers returns zeros.
P1 PROCESSOR 1. The interrupt is directed to processor 1.
P0 PROCESSOR 0. The interrupt is directed to processor 0.
Offset $10210
Bit 3
13 02 92 82 72 62 52 42 32 22 12 01 91 81 71 61 51 41 31 21 11 09876543210
Name HAWK INTERNAL ERROR INTERRUPT DESTINATION
P1 P0
Operation RRRR
R/W R/W
Reset $00 $00 $00 $00
0
0
Offset Processor 0 $20040, $20050, $20060, $20070
Processor 1 $21040, $21050,$21060, $21070
Bit 3
13 02 92 82 72 62 52 42 32 22 12 01 91 81 71 61 51 41 31 21 11 09876543210
Name IPI DISPATCH
P1 P0
Operation RRRR
W
W
Reset $00 $00 $00 $00
0
0