Toshiba 960-809 manual Troubleshooting Procedures Debug port error status 2/2

Troubleshooting Procedures

Table 2-4 Debug port error status (2/2)

System BIOS IRT processing
Debug Code		BIOS processing outline		Target Device	IC No.
F100	IRT section start		CPU		IS1050 (CPU Socket)
F101		Creation of SETUP		BIOSROM	IC3000/IC3002 (BIOS ROM)
					CN1400, CN1410 (RAM
		information		RAM
					Conn.)
F102	PCI Express initialization			PCH	IC1600 (PCH)
F103	PCH Express initialization		PCH		IC1600 (PCH)
F104		SMRAM Express		PCH	IC1600 (PCH)
					CN1400, CN1410 (RAM
		initialization		RAM
					Conn.)
F105		End of SMRAM		PCH	IS1050 (CPU Socket),
					CN1400, CN1410 (RAM
		initialization		RAM
					Conn.)
F106		EC Evart initialization		EC	IC3200 (EC/KBC)
F107		USB Legacy initialization	PCH		IC1600 (PCH)
F108		Device Lock main		RAM	CN1400, CN1410 (RAM
		processing start			Conn.)
F109		Device Lock device		RAM	CN1400, CN1410 (RAM
		processing start			Conn.)
F10A		End of Device Lock main		RAM	CN1400, CN1410 (RAM
		processing			Conn.)
F10B		Thermal control		RAM	CN1400, CN1410 (RAM
		initialization			Conn.)
F10C		Digital thermal sensor		CPU	IS1050 (CPU Socket)
		initialization
F10D		End for IRT of a module		RAM	CN1400, CN1410 (RAM
		load			Conn.)
F10E		Memory test start		RAM	CN1400, CN1410 (RAM
					Conn.)
F10F		End of a memory test		RAM	CN1400, CN1410 (RAM
					Conn.)
F110	VGA initialization start		VGA		IC1050 (VGA)
F111	VGA initialization end				CN1400, CN1410 (RAM
					Conn.)
F112		Interrupt vector initialization		RAM	CN1400, CN1410 (RAM
					Conn.)
				VGA	IC1050 (VGA),
					IC4000/IC4100 (LAN
F113	VGA, LAN initialization			LAN	Controller),
				BIOSROM	IC3000/IC3002 (BIOS
				RAM	ROM), CN1400, CN1410
					(RAM Conn.)
F114		end of option ROM		RAM	CN1400, CN1410 (RAM
		execution			Conn.)
		Determination of a boot devi			CN1400, CN1410 (RAM
F115		ce		RAM
					Conn.)
F116		SC initialization start		EC	IC3200 (EC/KBC)

2-28 [CONFIDENTIAL] PORTEGE M780 Maintenance Manual (960-809)