Chapter 13: Software Drivers
Clock Slave
If the core is acting as a clock slave, the local RTC is closely matched to the value and frequency of the network clock master. This is achieved, in part, by receiving the PTP Sync and
Because the drivers are provided as C code text files, they can be easily modified and designers can edit the files to provide their own secret source, or even to update the software drivers for P802.1AS specification changes.
Software System Integration
The software drivers for the Ethernet AVB Endpoint core need to be run on an embedded processor. In addition, they require instantiation into the overall software project, and then initialization.
An example software project file that performs the required steps is included with the core in the following location:
<component_name>/MyProcessorIPLib/drivers/
ethernet_avb_endpoint_v2_04_a/examples/xavb_example.c
This software example has been tested in a real system. For this reason, use this file for reference, along with the following descriptions:
•“Driver Instantiation”
•“Interrupt Service Routine Connections”
•“Core Initialization”
•“Ethernet AVB Endpoint Setup”
•“Starting and Stopping the AVB Drivers”
Note: Unless you are already familiar with the Xilinx Embedded Development Kit (EDK), see the EDK documentation to follow the steps described.
Driver Instantiation
Software driver instantiation for the Ethernet AVB Endpoint core follows the standard EDK model used for all EDK IP cores and as recommended for all user defined pcores (see the EDK documentation). Initialization of the driver requires that an instance of the driver is instantiated, assigned a base address within the PLB address range, and configured using the standardized cores CfgInitialize function.
132 | www.xilinx.com | Ethernet AVB Endpoint User Guide |
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| UG492 July 23, 2010 |