Chapter 5: Core Architecture

Software Drivers

Software Drivers are delivered with the Ethernet AVB Endpoint core. These drivers provide functions which utilize the dedicated hardware within the core for the PTP IEEE P802.1AS specification. Functions include:

The Best Master Clock Algorithm (BMCA) to determine whether the core should operate in master clock or slave clock mode

PTP Clock Master functions

PTP Clock Slave functions (which accurately synchronize the local Real Time Clock (RTC) to match that of the network clock master)

If the core is acting as clock master, then the software drivers delivered with the core will periodically sample the current value of the RTC and transmit this value to every device on the network using the P802.1 defined PTP packets. The hardware “Tx Time Stamp” logic, using the mechanism defined in P802.1AS, ensures the accuracy of this RTC sample mechanism.

If the core is acting as a clock slave, then the local RTC will be closely matched to the value and frequency of the network clock master. This is achieved, in part, by receiving the PTP frames transmitted across the network by the clock master (and containing the masters sampled RTC value). The PTP mechanism will also track the total routing delay across the network between the clock master and itself. The software drivers use this data, in conjunction with recent historical data, to calculate the error between its local RTC counter and that of the RTC clock master. The software will then periodically calculate an RTC correction value and an updated increment rate, and these values are written to appropriate RTC configuration registers. See Chapter 13, “Software Drivers” for further information.

Tri-Mode Ethernet MACs

Although not part of the Ethernet AVB Endpoint core, a Xilinx Tri-Mode Ethernet MAC core is a requirement of the system (see Figure 5-1and Figure 5-2). The IEEE Audio Video Bridging technology stipulates the following configuration requirements on this MAC:

The MAC must only operate in full-duplex mode

The MAC must only operate at 100 Mbps and/or 1 Gbps

VLAN mode must be enabled (the AV traffic will always contain VLAN fields)

Flow Control is not supported on the network and must be disabled

Jumbo Frames are not supported and must be disabled

The built-in Address Filter Module of the MAC must be disabled

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Ethernet AVB Endpoint User Guide

 

 

UG492 July 23, 2010

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Xilinx UG492 manual Software Drivers, Tri-Mode Ethernet MACs