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Chapter 1: Introduction
Recommended Design Experience
Although the Ethernet AVB Endpoint core is a fully verified solution, the challenge associated with implementing a complete design varies depending on the configuration and functionality of the application. For best results, previous experience building high- performance, pipelined FPGA designs using Xilinx implementation software and user constraint files (UCFs) is recommended. In addition, previous experience using the Embedded Development Kit (EDK) and developing embedded software applications is recommended. Contact your local Xilinx representative for a closer review and estimation for your specific requirements.
Additional Core Resources
For detailed information and updates about the Ethernet AVB Endpoint core, see the following documents, available from the product page.
•Ethernet AVB Endpoint Data Sheet
•Ethernet AVB Endpoint User Guide
From the document directory after generating the core:
•Ethernet AVB Endpoint Release Notes
Technical Support
For technical support, see www.support.xilinx.com/. Questions are routed to a team of engineers with expertise using the Ethernet AVB Endpoint core.
Xilinx provides technical support for use of this product as described in this guide. Xilinx cannot guarantee timing, functionality, or support of this product for designs that do not follow these guidelines.
Feedback
Xilinx welcomes comments and suggestions about the Ethernet AVB Endpoint core and the documentation supplied with the core.
Ethernet AVB Endpoint Core
For comments or suggestions about the Ethernet AVB Endpoint core, submit a WebCase from www.xilinx.com/support/clearexpress/websupport.htm/
Be sure to include the following information:
•Product name
•Core version number
•Explanation of your comments
24 | www.xilinx.com | Ethernet AVB Endpoint User Guide |
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| UG492 July 23, 2010 |