Preface: About This Guide

Chapter 13, “Software Drivers” describes the function of the software drivers delivered with the core.

Chapter 14, “Quick Start Example Design”Chapter 3, “Quick Start Example Design” provides instructions to quickly generate the core and run the example design through implementation and simulation using the default settings.

Chapter 15, “Detailed Example Design (Standard Format)” provides detailed information about the core when generated in the standard CORE Generator format, including a description of files and the directory structure generated

Chapter 16, “Detailed Example Design (EDK format)” provides detailed information about the core when generated in the Standard Embedded Development Kit (EDK) format, including a description of files and the directory structure generated.

Appendix A, “RTC Time Stamp Accuracy” describe the necessity of accurate time stamps, essential to the Precise Timing Protocol across the network link, and provides some of the ways inaccuracies are introduced.

Conventions

This document uses the following conventions. An example illustrates each convention.

Typographical

The following typographical conventions are used in this document:

Convention

 

Meaning or Use

Example

 

 

 

 

 

 

Messages, prompts, and

 

Courier font

 

program files that the system

speed grade: - 100

 

displays. Signal names in text

 

 

 

 

 

also.

 

 

 

 

 

Courier bold

 

Literal commands that you enter

ngdbuild design_name

 

 

in a syntactical statement

 

 

 

 

 

 

 

Commands that you select from

File Open

Helvetica bold

 

a menu

 

 

 

 

 

 

 

 

 

 

 

Keyboard shortcuts

Ctrl+C

 

 

 

 

 

 

Variables in a syntax statement

 

 

 

for which you must supply

ngdbuild design_name

 

 

values

 

Italic font

 

 

 

 

References to other manuals

See the User Guide for more

 

 

information.

 

 

 

 

 

 

 

 

 

 

If a wire is drawn so that it

 

 

Emphasis in text

overlaps the pin of a symbol, the

 

 

 

two nets are not connected.

 

 

 

 

Dark Shading

 

Items that are not supported or

This feature is not supported

 

reserved

 

 

 

 

 

 

 

 

 

An optional entry or parameter.

 

Square brackets

[ ]

However, in bus specifications,

ngdbuild [option_name]

such as bus[7:0], they are

design_name

 

 

 

 

required.

 

 

 

 

 

18

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UG492 July 23, 2010

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Xilinx UG492 manual Conventions, Typographical