Xilinx UG492 manual Schedule of Tables

Schedule of Tables

Chapter 1: Introduction

Chapter 2: Licensing the Core

Chapter 3: Overview of Ethernet Audio Video Bridging

Chapter 4: Generating the Core

Table 4-1:XCO File Values and Default Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Chapter 5: Core Architecture

Table 5-1:Clocks and Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Table 5-2:Legacy Traffic Signals: Transmitter Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Table 5-3:Legacy Traffic Signals: Receiver Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Table 5-4:AV Traffic Signals: Transmitter Path. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Table 5-5:AV Traffic Signals: Receiver Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Table 5-6:Tri-Mode Ethernet MAC Transmitter Interface. . . . . . . . . . . . . . . . . . . . . . . . . . 50

Table 5-7:Tri-Mode Ethernet MAC Receiver Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Table 5-8:Tri-Mode Ethernet MAC Host Interface (Configuration/Status) . . . . . . . . . . . 51

Table 5-9:PLB Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Table 5-10:Interrupt Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Table 5-11:PTP Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Chapter 6: Ethernet AVB Endpoint Transmission

Chapter 7: Ethernet AVB Endpoint Reception

Chapter 8: Real Time Clock and Time Stamping

Chapter 9: Precise Timing Protocol Packet Buffers

Chapter 10: Configuration and Status

Table 10-1:Tx PTP Packet Buffer Control Register (PLB_base_address + 0x2000) . . . . . 92

Table 10-2:Rx PTP Packet Buffer Control Register (PLB_base_address + 0x2004) . . . . . 93

Table 10-3:Rx Filtering Control Register (PLB_base_address + 0x2008) . . . . . . . . . . . . . . 93

Table 10-4:Tx Arbiter Send Slope Control Register (PLB_base_address + 0x200C) . . . . 94

Table 10-5:Tx Arbiter Idle Slope Control Register (PLB_base_address + 0x2010) . . . . . 94

Table 10-6:RTC Nanoseconds Field Offset (PLB_base_address + 0x2800) . . . . . . . . . . . . 94

Ethernet AVB Endpoint User Guide www.xilinx.com 13

UG492 July 23, 2010