Chapter 12: System Integration

Figure 12-8illustrates the connection of the core to an embedded processor subsystem (MicroBlaze™ processor is illustrated). Observe that:

The PLB can be shared across all peripherals as illustrated.

The “Interrupt Signals” should be connected to the inputs of an interrupt controller module, for example, the xps_intc core provided with the EDK.

The “Legacy Traffic Interface” and “Tri-Mode Ethernet MAC Client Interface” of the Ethernet AVB Endpoint core connect directly to the xps_ll_temac. This enables the xps_ll_temac to source and sink all legacy frame data. This legacy data is transferred to and from the processor domain over a LocalLink interface to a Multi-Port Memory Controller (MPMC); this contains scatter-gather DMA functionality and access to all processor memory such as external SDRAM (not illustrated). This allows software applications running on the processor to easily assemble and disassemble legacy ethernet packets.

The “AV Traffic Interface” remains available for custom logic. This will be able to take priority over the processors legacy traffic as defined by the “P802.1Qav” component of the AVB specification.

Note that the embedded processor should be configured to use the software drivers provided with the core (see Chapter 13, “Software Drivers”).

Ethernet AVB Endpoint Connections

Figure 12-8illustrates the overall connections of the Ethernet AVB Endpoint core; only the “AV Traffic Interface” remains unconnected and is therefore available for custom logic.

All connections must be made in the EDK environment; please refer to Xilinx Platform Studio documentation. Extracts from a .mhs file will be included at the end of this section to further illustrate these connections.

Figure 12-9illustrates the connections of the Ethernet AVB Endpoint core to the XPS LocalLink Tri-Mode Ethernet MAC (xps_ll_temac) core in detail. All connections, as shown, are logic-less connections. Observe that:

The “Legacy Traffic Interface” and “Tri-Mode Ethernet MAC Client Interface” of the Ethernet AVB Endpoint core connect directly to the xps_ll_temac.

The Ethernet transmitter client clock domain must always be connected to the

tx_clk input of the Ethernet AVB Endpoint core. Additionally, the transmitter clock enable, as used with the TEMAC, must always be connected to the tx_clk_en input of the Ethernet AVB Endpoint core.

The Ethernet receiver client clock domain must always be connected to the rx_clk input of the Ethernet AVB Endpoint core. Additionally, the receiver clock enable, as used with the TEMAC, must always be connected to the rx_clk_en input of the Ethernet AVB Endpoint core.

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Ethernet AVB Endpoint User Guide

 

 

UG492 July 23, 2010

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Xilinx UG492 manual Ethernet AVB Endpoint Connections