Table 8-2 Standard Event Status Enable Register
Bit Position Bit Weight Enables
7 128 PON - Power On
6 64 URQ - User Request
5 32 CME - Command Error
4 16 EXE - Execution Error
3 8 DDE - Device Dependent Error
2 4 QYE - Query Error
1 2 RQC - Request Control
0 1 OPC - Operation Complete
*ESR (Event Status Register)
Query *ESR?
The *ESR? query returns the contents of the Standard Event Status Register.
Reading the register clears the Standard Event Status Register.
Returned Format <status><NL>
<status> An integer from 0 to 255
Example If a command error has occurred, and bit 5 of the ESE register is set, the
string variable Esr_event$ will have bit 5 (the CME bit) set.
10 OUTPUT XXX;" *ESE 32" !Enables bit 5 of the status re gister
20 OUTPUT XXX;" *ESR?" !Queries the st atus register
30 ENTER XXX; E sr_event$ !Reads the query buff er
Common Commands
*ESR (Event Status Register)
8–7