Agilent Technologies 6843A, 6834B Standard Event Status Group, Register, Command, Description

4 - Programming Examples

Register

Condition

PTR Filter

NTR Filter

Event

Enable

Command

STAT:QUES:INST:ISUM:COND?

STAT:QUES:INST:ISUM:PTR <n>

STAT:QUES:INST:ISUM:NTR <n>

STAT:QUES:INST:ISUM:EVEN?

STAT:QUES:INST:ISUM:ENAB? <n>

Description

A register that holds real-time status of the circuits being monitored. It is a read-only register.

A positive transition filter that functions as described under STAT:QUES:INST:ISUM:NTRPTR commands in Chapter 3. It is a read/write register.

A negative transition filter that functions as described under STAT:QUES:INST:ISUM:NTRPTR commands in Chapter 3. It is a read/write register.

A register that latches any condition that is passed through the PTR or NTR filters. It is a read-only register that is cleared when read.

A register that functions as a mask for enabling specific bits from the Event register. It is a read/write register.

The outputs of the Questionable Instrument Isummary Status group are logically-ORed into the Isum bit (13) of the Questionable Condition register.

Standard Event Status Group

This group consists of an Event register and an Enable register that are programmed by Common commands. The Standard Event register latches events relating to interface communication status (see figure 4-5). It is a read-only register that is cleared when read. The Standard Event Enable register functions similarly to the enable registers of the Operation and Questionable status groups.

Command Action

*ESE - programs specific bits in the Standard Event Enable register.

*PSC ON - clears the Standard Event Enable register at power-on.

*ESR? - reads and clears the Standard Event register.

The PON (Power On) Bit

The PON bit in the Standard Event register is set whenever the ac source is turned on. The most common use for PON is to generate an SRQ at power-on following an unexpected loss of power. To do this, bit 7 of the Standard Event Enable register must be set so that a power-on event registers in the ESB (Standard Event Summary Bit). Bit 5 of the Service Request Enable register must be set to permit an SRQ to be generated, and *PSC OFF must be sent. The commands to accomplish these conditions are:

*PSC OFF

*ESE 128

*SRE 32

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